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X-OriginatorOrg: arm.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 May 2023 13:38:59.2157 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 2c476e53-5814-4897-0f6c-08db5c5c3a97 X-MS-Exchange-CrossTenant-Id: f34e5979-57d9-4aaa-ad4d-b122a662184d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=f34e5979-57d9-4aaa-ad4d-b122a662184d;Ip=[63.35.35.123];Helo=[64aa7808-outbound-1.mta.getcheckrecipient.com] X-MS-Exchange-CrossTenant-AuthSource: DBAEUR03FT038.eop-EUR03.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM9PR08MB6002 Content-Type: text/plain GICD_SGIR is a 32-bit register, of which INTID is bits [3:0] and Bits [14:4] is RES0. Since SgiId parameter in the function ArmGicSendSgiTo () is UINT8, mask unused bits of SgiId before writing to the GICD_SGIR register to prevent accidental setting of the RES0 bits. Signed-off-by: Sami Mujawar Reviewed-by: Ard Biesheuvel --- Notes: v2: - Updated copyright year [Sami] ArmPkg/Drivers/ArmGic/ArmGicLib.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/ArmPkg/Drivers/ArmGic/ArmGicLib.c b/ArmPkg/Drivers/ArmGic/ArmGicLib.c index eefe6350eb804bf9b2727b605d59035877ffb817..0127cca3bf0567bc80702f415e9cbb9bd2709fbc 100644 --- a/ArmPkg/Drivers/ArmGic/ArmGicLib.c +++ b/ArmPkg/Drivers/ArmGic/ArmGicLib.c @@ -148,7 +148,9 @@ ArmGicSendSgiTo ( { MmioWrite32 ( GicDistributorBase + ARM_GIC_ICDSGIR, - ((TargetListFilter & 0x3) << 24) | ((CPUTargetList & 0xFF) << 16) | SgiId + ((TargetListFilter & 0x3) << 24) | + ((CPUTargetList & 0xFF) << 16) | + (SgiId & 0xF) ); } -- 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'