From: "Sami Mujawar" <sami.mujawar@arm.com>
To: <devel@edk2.groups.io>
Cc: Sami Mujawar <sami.mujawar@arm.com>, <ardb+tianocore@kernel.org>,
<quic_llindhol@quicinc.com>, <neil.jones@blaize.com>,
<pedro.falcato@gmail.com>, <pierre.gondois@arm.com>,
<Matteo.Carlini@arm.com>, <Akanksha.Jain2@arm.com>,
<Ben.Adderson@arm.com>, <Sibel.Allinson@arm.com>, <nd@arm.com>
Subject: [PATCH v2 10/11] ArmPkg: Adjust variable type and cast for RegShift & RegOffset
Date: Wed, 24 May 2023 14:38:39 +0100 [thread overview]
Message-ID: <20230524133840.28612-11-sami.mujawar@arm.com> (raw)
In-Reply-To: <20230524133840.28612-1-sami.mujawar@arm.com>
According to the GIC architecture version 3 and 4 specification,
the maximum number of INTID bits supported in the CPU interface
is 24.
Considering this the RegShift variable is not required to be more
than 8 bits. Therefore, make the RegShift variable type to UINT8.
Also add necessary typecasts when calculating the RegOffset and
RegShift values.
Signed-off-by: Sami Mujawar <sami.mujawar@arm.com>
---
Notes:
v2:
- updated copyright year [Sami]
ArmPkg/Drivers/ArmGic/ArmGicLib.c | 24 ++++++++++----------
ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c | 6 ++---
2 files changed, 15 insertions(+), 15 deletions(-)
diff --git a/ArmPkg/Drivers/ArmGic/ArmGicLib.c b/ArmPkg/Drivers/ArmGic/ArmGicLib.c
index 0127cca3bf0567bc80702f415e9cbb9bd2709fbc..8f3315d76f6f2b28a551d73400938430ff3e23c7 100644
--- a/ArmPkg/Drivers/ArmGic/ArmGicLib.c
+++ b/ArmPkg/Drivers/ArmGic/ArmGicLib.c
@@ -228,13 +228,13 @@ ArmGicSetInterruptPriority (
)
{
UINT32 RegOffset;
- UINTN RegShift;
+ UINT8 RegShift;
ARM_GIC_ARCH_REVISION Revision;
UINTN GicCpuRedistributorBase;
// Calculate register offset and bit position
- RegOffset = Source / 4;
- RegShift = (Source % 4) * 8;
+ RegOffset = (UINT32)(Source / 4);
+ RegShift = (UINT8)((Source % 4) * 8);
Revision = ArmGicGetSupportedArchRevision ();
if ((Revision == ARM_GIC_ARCH_REVISION_2) ||
@@ -272,13 +272,13 @@ ArmGicEnableInterrupt (
)
{
UINT32 RegOffset;
- UINTN RegShift;
+ UINT8 RegShift;
ARM_GIC_ARCH_REVISION Revision;
UINTN GicCpuRedistributorBase;
// Calculate enable register offset and bit position
- RegOffset = Source / 32;
- RegShift = Source % 32;
+ RegOffset = (UINT32)(Source / 32);
+ RegShift = (UINT8)(Source % 32);
Revision = ArmGicGetSupportedArchRevision ();
if ((Revision == ARM_GIC_ARCH_REVISION_2) ||
@@ -317,13 +317,13 @@ ArmGicDisableInterrupt (
)
{
UINT32 RegOffset;
- UINTN RegShift;
+ UINT8 RegShift;
ARM_GIC_ARCH_REVISION Revision;
UINTN GicCpuRedistributorBase;
// Calculate enable register offset and bit position
- RegOffset = Source / 32;
- RegShift = Source % 32;
+ RegOffset = (UINT32)(Source / 32);
+ RegShift = (UINT8)(Source % 32);
Revision = ArmGicGetSupportedArchRevision ();
if ((Revision == ARM_GIC_ARCH_REVISION_2) ||
@@ -361,14 +361,14 @@ ArmGicIsInterruptEnabled (
)
{
UINT32 RegOffset;
- UINTN RegShift;
+ UINT8 RegShift;
ARM_GIC_ARCH_REVISION Revision;
UINTN GicCpuRedistributorBase;
UINT32 Interrupts;
// Calculate enable register offset and bit position
- RegOffset = Source / 32;
- RegShift = Source % 32;
+ RegOffset = (UINT32)(Source / 32);
+ RegShift = (UINT8)(Source % 32);
Revision = ArmGicGetSupportedArchRevision ();
if ((Revision == ARM_GIC_ARCH_REVISION_2) ||
diff --git a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c b/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c
index cd371cab2a0159b54d8e6f0f5d3930e1276cbf7e..6300a2a54b194cb8c874a4e7db9051b9732d8be2 100644
--- a/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c
+++ b/ArmPkg/Drivers/ArmGic/GicV2/ArmGicV2Dxe.c
@@ -393,7 +393,7 @@ GicV2DxeInitialize (
EFI_STATUS Status;
UINTN Index;
UINT32 RegOffset;
- UINTN RegShift;
+ UINT8 RegShift;
UINT32 CpuTarget;
// Make sure the Interrupt Controller Protocol is not already installed in
@@ -411,8 +411,8 @@ GicV2DxeInitialize (
GicV2DisableInterruptSource (&gHardwareInterruptV2Protocol, Index);
// Set Priority
- RegOffset = Index / 4;
- RegShift = (Index % 4) * 8;
+ RegOffset = (UINT32)(Index / 4);
+ RegShift = (UINT8)((Index % 4) * 8);
MmioAndThenOr32 (
mGicDistributorBase + ARM_GIC_ICDIPR + (4 * RegOffset),
~(0xff << RegShift),
--
'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)'
next prev parent reply other threads:[~2023-05-24 13:39 UTC|newest]
Thread overview: 13+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-05-24 13:38 [PATCH v2 00/11] ArmPkg: Arm GIC Library and Driver improvements Sami Mujawar
2023-05-24 13:38 ` [PATCH v2 01/11] ArmPkg: Fix data type used for GicDistributorBase Sami Mujawar
2023-05-24 13:38 ` [PATCH v2 02/11] ArmPkg: Fix data type used for GicInterruptInterfaceBase Sami Mujawar
2023-05-24 13:38 ` [PATCH v2 03/11] ArmPkg: Fix ArmGicSendSgiTo() parameters Sami Mujawar
2023-05-24 13:38 ` [PATCH v2 04/11] ArmPkg: Fix Non-Boolean comparison in ArmGicEnableDistributor Sami Mujawar
2023-05-24 13:38 ` [PATCH v2 05/11] ArmPkg: Fix return type for ArmGicGetInterfaceIdentification Sami Mujawar
2023-05-24 13:38 ` [PATCH v2 06/11] ArmPkg: Make variables used for GicInterrupt UINTN Sami Mujawar
2023-05-24 13:38 ` [PATCH v2 07/11] ArmPkg: Typecast IntID to UINT32 in ArmGicV2EndOfInterrupt Sami Mujawar
2023-05-24 13:38 ` [PATCH v2 08/11] ArmPkg: Remove unused function declarations Sami Mujawar
2023-05-24 13:38 ` [PATCH v2 09/11] ArmPkg: Prevent SgiId from setting RES0 bits of GICD_SGIR Sami Mujawar
2023-05-24 13:38 ` Sami Mujawar [this message]
2023-05-24 13:38 ` [PATCH v2 11/11] ArmPkg: Fix ArmGicAcknowledgeInterrupt () for GICv3 Sami Mujawar
2023-06-01 16:09 ` [PATCH v2 00/11] ArmPkg: Arm GIC Library and Driver improvements Ard Biesheuvel
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