From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by mx.groups.io with SMTP id smtpd.web11.13289.1685025089047176997 for ; Thu, 25 May 2023 07:31:29 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=PnooJ3TX; spf=pass (domain: kernel.org, ip: 139.178.84.217, mailfrom: ardb@kernel.org) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 93F23645DC; Thu, 25 May 2023 14:31:28 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 79C24C4339B; Thu, 25 May 2023 14:31:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1685025088; bh=AjfglahNpTgtfZpmoYtD4q9NMFmAp7CepTeffmlPi5E=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=PnooJ3TXJguNHlVV4PNVJgdnoMEXirjQPB4O6IDpj8N7j3Hwy6AP9lHnMqrJ/z843 i1WMceAqjtmvBWSX3hZ33TcPkSvHC+j+56ydMxAQ+gozNgwEBHpQ3gR5H0g/PuO6kz 3y1G5DS8BwsDqYS8MPoSjr4CKEoB1GyFmJsHc8EQUobNKA2SLmFDCQgI48IZw2Dlxd 1w5snEZXBDYwMc8VGuR6sj38Ui5EVmCbtzRi1R5DioHNIPRbsevoJMQfJyb+Ntuiwv 323hLRSKWYGjoz/Gjjg7X0/Q7Fq0unbQv3WlhDPqXLhDsmhnFYHiDcyS/r+UBoPdqi bbRO47JLzk4jw== From: "Ard Biesheuvel" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Ray Ni , Jiewen Yao , Gerd Hoffmann , Taylor Beebe , Oliver Smith-Denny , Dandan Bi , Liming Gao , "Kinney, Michael D" , Leif Lindholm , Sunil V L , Andrei Warkentin Subject: [RFC PATCH 10/10] MdeModulePkg/DxeIpl ARM AARCH64: Switch to generic handoff code Date: Thu, 25 May 2023 16:30:41 +0200 Message-Id: <20230525143041.1172989-11-ardb@kernel.org> X-Mailer: git-send-email 2.39.2 In-Reply-To: <20230525143041.1172989-1-ardb@kernel.org> References: <20230525143041.1172989-1-ardb@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Now that we have a generic method to manage memory permissions using a PPI, we can switch to the generic version of the DXE handoff code in DxeIpl, and drop the ARM specific version. Signed-off-by: Ard Biesheuvel --- MdeModulePkg/Core/DxeIplPeim/Arm/DxeLoadFunc.c | 71 -------------------- MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf | 11 +-- 2 files changed, 1 insertion(+), 81 deletions(-) diff --git a/MdeModulePkg/Core/DxeIplPeim/Arm/DxeLoadFunc.c b/MdeModulePkg/= Core/DxeIplPeim/Arm/DxeLoadFunc.c deleted file mode 100644 index f62b6dcb38a702d7..0000000000000000 --- a/MdeModulePkg/Core/DxeIplPeim/Arm/DxeLoadFunc.c +++ /dev/null @@ -1,71 +0,0 @@ -/** @file=0D - ARM specifc functionality for DxeLoad.=0D -=0D -Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
=0D -Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
=0D -=0D -SPDX-License-Identifier: BSD-2-Clause-Patent=0D -=0D -**/=0D -=0D -#include "DxeIpl.h"=0D -=0D -#include =0D -=0D -/**=0D - Transfers control to DxeCore.=0D -=0D - This function performs a CPU architecture specific operations to execut= e=0D - the entry point of DxeCore with the parameters of HobList.=0D - It also installs EFI_END_OF_PEI_PPI to signal the end of PEI phase.=0D -=0D - @param DxeCoreEntryPoint The entry point of DxeCore.=0D - @param HobList The start of HobList passed to DxeCore= .=0D -=0D -**/=0D -VOID=0D -HandOffToDxeCore (=0D - IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint,=0D - IN EFI_PEI_HOB_POINTERS HobList=0D - )=0D -{=0D - VOID *BaseOfStack;=0D - VOID *TopOfStack;=0D - EFI_STATUS Status;=0D -=0D - //=0D - // Allocate 128KB for the Stack=0D - //=0D - BaseOfStack =3D AllocatePages (EFI_SIZE_TO_PAGES (STACK_SIZE));=0D - ASSERT (BaseOfStack !=3D NULL);=0D -=0D - if (PcdGetBool (PcdSetNxForStack)) {=0D - Status =3D ArmSetMemoryRegionNoExec ((UINTN)BaseOfStack, STACK_SIZE);= =0D - ASSERT_EFI_ERROR (Status);=0D - }=0D -=0D - //=0D - // Compute the top of the stack we were allocated. Pre-allocate a UINTN= =0D - // for safety.=0D - //=0D - TopOfStack =3D (VOID *)((UINTN)BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SI= ZE) * EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT);=0D - TopOfStack =3D ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT);=0D -=0D - //=0D - // End of PEI phase singal=0D - //=0D - Status =3D PeiServicesInstallPpi (&gEndOfPeiSignalPpi);=0D - ASSERT_EFI_ERROR (Status);=0D -=0D - //=0D - // Update the contents of BSP stack HOB to reflect the real stack info p= assed to DxeCore.=0D - //=0D - UpdateStackHob ((EFI_PHYSICAL_ADDRESS)(UINTN)BaseOfStack, STACK_SIZE);=0D -=0D - SwitchStack (=0D - (SWITCH_STACK_ENTRY_POINT)(UINTN)DxeCoreEntryPoint,=0D - HobList.Raw,=0D - NULL,=0D - TopOfStack=0D - );=0D -}=0D diff --git a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf b/MdeModulePkg/Core/Dx= eIplPeim/DxeIpl.inf index 7126a96d8378d1f8..f1990eac77607854 100644 --- a/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf +++ b/MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf @@ -45,19 +45,13 @@ [Sources.X64] X64/VirtualMemory.c=0D X64/DxeLoadFunc.c=0D =0D -[Sources.ARM, Sources.AARCH64]=0D - Arm/DxeLoadFunc.c=0D -=0D -[Sources.LOONGARCH64,Sources.RISCV64,Sources.EBC]=0D +[Sources.LOONGARCH64,Sources.RISCV64,Sources.EBC,Sources.ARM,Sources.AARCH= 64]=0D DxeHandoff.c=0D =0D [Packages]=0D MdePkg/MdePkg.dec=0D MdeModulePkg/MdeModulePkg.dec=0D =0D -[Packages.ARM, Packages.AARCH64]=0D - ArmPkg/ArmPkg.dec=0D -=0D [LibraryClasses]=0D PcdLib=0D MemoryAllocationLib=0D @@ -74,9 +68,6 @@ [LibraryClasses] PeiServicesTablePointerLib=0D PerformanceLib=0D =0D -[LibraryClasses.ARM, LibraryClasses.AARCH64]=0D - ArmMmuLib=0D -=0D [Ppis]=0D gEfiDxeIplPpiGuid ## PRODUCES=0D gEfiPeiDecompressPpiGuid ## PRODUCES=0D --=20 2.39.2