From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by mx.groups.io with SMTP id smtpd.web10.9554.1685111714902914724 for ; Fri, 26 May 2023 07:35:14 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=FXNUWWPw; spf=pass (domain: intel.com, ip: 192.55.52.136, mailfrom: ray.ni@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1685111714; x=1716647714; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=iEnwcluRf/rxNKl9g4iX7tTwZLpleJoIRKA5I7E4CHA=; b=FXNUWWPwkB9FgUtVPmLdMiuuiuLQxWwpBeXfTmPWRqAoAvG+gw9fQdOE ct9xsehEJvFkHlXUkVDDOZd0Mr9Ke2+cfOOwhXKR71NIE1n0fTYhvDF2Y vmSMi6VBVgX3lSmcaMssyDgva6Otthaw7vluQjCDmCuM/XwF/l5p4l0eh 84j9YIUgPBZHNEkRMSKUVXPxym3VJ/xqUc5hcuRZBlVIhe8CMhxU2R7jz XgLYZ7sGGj4ZqFnBSJj738WsGGsam5t7ZlGAt/xgkAeUX7SIz85m5fXRN yb+w8qpBjwbacfBnvOVtizluESre/hhwU5QKT8tU+gvlIo+KSfnHVdMAt w==; X-IronPort-AV: E=McAfee;i="6600,9927,10722"; a="333838589" X-IronPort-AV: E=Sophos;i="6.00,194,1681196400"; d="scan'208";a="333838589" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 May 2023 07:34:36 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10722"; a="770361054" X-IronPort-AV: E=Sophos;i="6.00,194,1681196400"; d="scan'208";a="770361054" Received: from shwdeopenlab706.ccr.corp.intel.com ([10.239.55.95]) by fmsmga008.fm.intel.com with ESMTP; 26 May 2023 07:34:35 -0700 From: "Ni, Ray" To: devel@edk2.groups.io Cc: Eric Dong , Rahul Kumar , Gerd Hoffmann Subject: [PATCH 1/3] UefiCpuPkg/CpuSmm: Add perf-logging for time-consuming BSP procedures Date: Fri, 26 May 2023 22:34:29 +0800 Message-Id: <20230526143431.2100-2-ray.ni@intel.com> X-Mailer: git-send-email 2.39.1.windows.1 In-Reply-To: <20230526143431.2100-1-ray.ni@intel.com> References: <20230526143431.2100-1-ray.ni@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable The patch adds perf-logging for the following potential time-consuming BSP procedures: * PiCpuSmmEntry - SmmRelocateBases * ExecuteFirstSmiInit * BSPHandler - SmmWaitForApArrival - PerformRemainingTasks * InitPaging * SetMemMapAttributes * SetUefiMemMapAttributes * SetPageTableAttributes * ConfigSmmCodeAccessCheck * SmmCpuFeaturesCompleteSmmReadyToLock Cc: Eric Dong Cc: Rahul Kumar Cc: Gerd Hoffmann --- UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c | 8 +++++- UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c | 27 +++++++++++++++++++ UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h | 1 + UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf | 1 + .../PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c | 13 ++++++--- UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c | 4 ++- 6 files changed, 49 insertions(+), 5 deletions(-) diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c b/UefiCpuPkg/PiSmmCpuDxe= Smm/MpService.c index baf827cf9d..fa666bd118 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c @@ -351,6 +351,8 @@ SmmWaitForApArrival ( UINT32 DelayedCount;=0D UINT32 BlockedCount;=0D =0D + PERF_FUNCTION_BEGIN ();=0D +=0D DelayedCount =3D 0;=0D BlockedCount =3D 0;=0D =0D @@ -439,7 +441,7 @@ SmmWaitForApArrival ( DEBUG ((DEBUG_INFO, "SmmWaitForApArrival: Delayed AP Count =3D %d, Blo= cked AP Count =3D %d\n", DelayedCount, BlockedCount));=0D }=0D =0D - return;=0D + PERF_FUNCTION_END ();=0D }=0D =0D /**=0D @@ -577,6 +579,8 @@ BSPHandler ( ASSERT (CpuIndex =3D=3D mSmmMpSyncData->BspIndex);=0D ApCount =3D 0;=0D =0D + PERF_FUNCTION_BEGIN ();=0D +=0D //=0D // Flag BSP's presence=0D //=0D @@ -792,6 +796,8 @@ BSPHandler ( *mSmmMpSyncData->Counter =3D 0;=0D *mSmmMpSyncData->AllCpusInSync =3D FALSE;=0D mSmmMpSyncData->AllApArrivedWithException =3D FALSE;=0D +=0D + PERF_FUNCTION_END ();=0D }=0D =0D /**=0D diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c b/UefiCpuPkg/PiSmmC= puDxeSmm/PiSmmCpuDxeSmm.c index c0e368ea94..2fc7dda682 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c @@ -410,12 +410,15 @@ ExecuteFirstSmiInit ( {=0D UINTN Index;=0D =0D + PERF_FUNCTION_BEGIN ();=0D +=0D if (mSmmInitialized =3D=3D NULL) {=0D mSmmInitialized =3D (BOOLEAN *)AllocatePool (sizeof (BOOLEAN) * mMaxNu= mberOfCpus);=0D }=0D =0D ASSERT (mSmmInitialized !=3D NULL);=0D if (mSmmInitialized =3D=3D NULL) {=0D + PERF_FUNCTION_END ();=0D return;=0D }=0D =0D @@ -442,6 +445,8 @@ ExecuteFirstSmiInit ( while (!(BOOLEAN)mSmmInitialized[Index]) {=0D }=0D }=0D +=0D + PERF_FUNCTION_END ();=0D }=0D =0D /**=0D @@ -463,6 +468,8 @@ SmmRelocateBases ( UINTN Index;=0D UINTN BspIndex;=0D =0D + PERF_FUNCTION_BEGIN ();=0D +=0D //=0D // Make sure the reserved size is large enough for procedure SmmInitTemp= late.=0D //=0D @@ -540,6 +547,7 @@ SmmRelocateBases ( //=0D CopyMem (CpuStatePtr, &BakBuf2, sizeof (BakBuf2));=0D CopyMem (U8Ptr, BakBuf, sizeof (BakBuf));=0D + PERF_FUNCTION_END ();=0D }=0D =0D /**=0D @@ -617,6 +625,8 @@ PiCpuSmmEntry ( GuidHob =3D NULL;=0D SmmBaseHobData =3D NULL;=0D =0D + PERF_FUNCTION_BEGIN ();=0D +=0D //=0D // Initialize address fixup=0D //=0D @@ -1194,6 +1204,7 @@ PiCpuSmmEntry ( =0D DEBUG ((DEBUG_INFO, "SMM CPU Module exit from SMRAM with EFI_SUCCESS\n")= );=0D =0D + PERF_FUNCTION_END ();=0D return EFI_SUCCESS;=0D }=0D =0D @@ -1348,12 +1359,15 @@ ConfigSmmCodeAccessCheck ( UINTN Index;=0D EFI_STATUS Status;=0D =0D + PERF_FUNCTION_BEGIN ();=0D +=0D //=0D // Check to see if the Feature Control MSR is supported on this CPU=0D //=0D Index =3D gSmmCpuPrivate->SmmCoreEntryContext.CurrentlyExecutingCpu;=0D if (!SmmCpuFeaturesIsSmmRegisterSupported (Index, SmmRegFeatureControl))= {=0D mSmmCodeAccessCheckEnable =3D FALSE;=0D + PERF_FUNCTION_END ();=0D return;=0D }=0D =0D @@ -1363,6 +1377,7 @@ ConfigSmmCodeAccessCheck ( //=0D if ((AsmReadMsr64 (EFI_MSR_SMM_MCA_CAP) & SMM_CODE_ACCESS_CHK_BIT) =3D= =3D 0) {=0D mSmmCodeAccessCheckEnable =3D FALSE;=0D + PERF_FUNCTION_END ();=0D return;=0D }=0D =0D @@ -1419,6 +1434,8 @@ ConfigSmmCodeAccessCheck ( ReleaseSpinLock (mConfigSmmCodeAccessCheckLock);=0D }=0D }=0D +=0D + PERF_FUNCTION_END ();=0D }=0D =0D /**=0D @@ -1540,6 +1557,8 @@ PerformRemainingTasks ( )=0D {=0D if (mSmmReadyToLock) {=0D + PERF_FUNCTION_BEGIN ();=0D +=0D //=0D // Start SMM Profile feature=0D //=0D @@ -1574,12 +1593,20 @@ PerformRemainingTasks ( //=0D ConfigSmmCodeAccessCheck ();=0D =0D + //=0D + // Measure performance of SmmCpuFeaturesCompleteSmmReadyToLock() from = caller side=0D + // as the implementation is provided by platform.=0D + //=0D + PERF_START (NULL, "SmmCompleteReadyToLock", NULL, 0);=0D SmmCpuFeaturesCompleteSmmReadyToLock ();=0D + PERF_END (NULL, "SmmCompleteReadyToLock", NULL, 0);=0D =0D //=0D // Clean SMM ready to lock flag=0D //=0D mSmmReadyToLock =3D FALSE;=0D +=0D + PERF_FUNCTION_END ();=0D }=0D }=0D =0D diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h b/UefiCpuPkg/PiSmmC= puDxeSmm/PiSmmCpuDxeSmm.h index a5c2bdd971..b03f2ef882 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h @@ -50,6 +50,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include =0D #include =0D #include =0D +#include =0D =0D #include =0D #include =0D diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf b/UefiCpuPkg/PiSm= mCpuDxeSmm/PiSmmCpuDxeSmm.inf index 158e05e264..af66a1941c 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf @@ -97,6 +97,7 @@ ReportStatusCodeLib=0D SmmCpuFeaturesLib=0D PeCoffGetEntryPointLib=0D + PerformanceLib=0D =0D [Protocols]=0D gEfiSmmAccess2ProtocolGuid ## CONSUMES=0D diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c b/UefiCpuPk= g/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c index 834a756061..8b21e16f1c 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c @@ -1,6 +1,6 @@ /** @file=0D =0D -Copyright (c) 2016 - 2019, Intel Corporation. All rights reserved.
=0D +Copyright (c) 2016 - 2023, Intel Corporation. All rights reserved.
=0D SPDX-License-Identifier: BSD-2-Clause-Patent=0D =0D **/=0D @@ -1100,6 +1100,8 @@ SetMemMapAttributes ( return;=0D }=0D =0D + PERF_FUNCTION_BEGIN ();=0D +=0D DEBUG ((DEBUG_INFO, "MemoryAttributesTable:\n"));=0D DEBUG ((DEBUG_INFO, " Version - 0x%08x\n", MemoryAttr= ibutesTable->Version));=0D DEBUG ((DEBUG_INFO, " NumberOfEntries - 0x%08x\n", MemoryAttr= ibutesTable->NumberOfEntries));=0D @@ -1152,7 +1154,7 @@ SetMemMapAttributes ( PatchSmmSaveStateMap ();=0D PatchGdtIdtMap ();=0D =0D - return;=0D + PERF_FUNCTION_END ();=0D }=0D =0D /**=0D @@ -1454,6 +1456,8 @@ SetUefiMemMapAttributes ( UINTN Index;=0D EFI_MEMORY_DESCRIPTOR *Entry;=0D =0D + PERF_FUNCTION_BEGIN ();=0D +=0D DEBUG ((DEBUG_INFO, "SetUefiMemMapAttributes\n"));=0D =0D if (mUefiMemoryMap !=3D NULL) {=0D @@ -1537,6 +1541,8 @@ SetUefiMemMapAttributes ( //=0D // Do not free mUefiMemoryAttributesTable, it will be checked in IsSmmCo= mmBufferForbiddenAddress().=0D //=0D +=0D + PERF_FUNCTION_END ();=0D }=0D =0D /**=0D @@ -1862,6 +1868,7 @@ SetPageTableAttributes ( return;=0D }=0D =0D + PERF_FUNCTION_BEGIN ();=0D DEBUG ((DEBUG_INFO, "SetPageTableAttributes\n"));=0D =0D //=0D @@ -1900,5 +1907,5 @@ SetPageTableAttributes ( EnableCet ();=0D }=0D =0D - return;=0D + PERF_FUNCTION_END ();=0D }=0D diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c b/UefiCpuPkg/PiSmmCpuDx= eSmm/SmmProfile.c index 1b0b6673e1..ed6e58065f 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c @@ -575,6 +575,8 @@ InitPaging ( IA32_CR4 Cr4;=0D BOOLEAN Enable5LevelPaging;=0D =0D + PERF_FUNCTION_BEGIN ();=0D +=0D Cr4.UintN =3D AsmReadCr4 ();=0D Enable5LevelPaging =3D (BOOLEAN)(Cr4.Bits.LA57 =3D=3D 1);=0D =0D @@ -810,7 +812,7 @@ InitPaging ( //=0D mXdEnabled =3D TRUE;=0D =0D - return;=0D + PERF_FUNCTION_END ();=0D }=0D =0D /**=0D --=20 2.39.1.windows.1