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[174.50.177.95]) by smtp.gmail.com with ESMTPSA id k3-20020aa792c3000000b005d22639b577sm3106308pfa.165.2023.05.26.16.17.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 26 May 2023 16:17:48 -0700 (PDT) From: "Tuan Phan" To: devel@edk2.groups.io Cc: michael.d.kinney@intel.com, gaoliming@byosoft.com.cn, zhiguang.liu@intel.com, sunilvl@ventanamicro.com, git@danielschaefer.me, andrei.warkentin@intel.com, Tuan Phan Subject: [PATCH v3 7/7] OvmfPkg/RiscVVirt: SEC: Add IO memory resource hob for platform devices Date: Fri, 26 May 2023 16:17:33 -0700 Message-Id: <20230526231733.6755-8-tphan@ventanamicro.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20230526231733.6755-1-tphan@ventanamicro.com> References: <20230526231733.6755-1-tphan@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Normally, DXE driver would add device resource to GCD before start using. But some key resources such as uart, flash base address are being accessing directly in some core modules. Those resources should be populated to HOB in SEC phase so they are added to GCD before anyone can access them. Signed-off-by: Tuan Phan Reviewed-by: Andrei Warkentin --- OvmfPkg/RiscVVirt/Sec/Platform.c | 62 +++++++++++++++++++++++++++++++ OvmfPkg/RiscVVirt/Sec/SecMain.inf | 1 + 2 files changed, 63 insertions(+) diff --git a/OvmfPkg/RiscVVirt/Sec/Platform.c b/OvmfPkg/RiscVVirt/Sec/Platf= orm.c index 3645c27b0b12..944b82c84a6e 100644 --- a/OvmfPkg/RiscVVirt/Sec/Platform.c +++ b/OvmfPkg/RiscVVirt/Sec/Platform.c @@ -21,6 +21,63 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include =0D #include =0D =0D +/**=0D + Build memory map I/O range resource HOB using the=0D + base address and size.=0D +=0D + @param MemoryBase Memory map I/O base.=0D + @param MemorySize Memory map I/O size.=0D +=0D +**/=0D +STATIC=0D +VOID=0D +AddIoMemoryBaseSizeHob (=0D + EFI_PHYSICAL_ADDRESS MemoryBase,=0D + UINT64 MemorySize=0D + )=0D +{=0D + /* Align to EFI_PAGE_SIZE */=0D + MemorySize =3D ALIGN_VALUE (MemorySize, EFI_PAGE_SIZE);=0D + BuildResourceDescriptorHob (=0D + EFI_RESOURCE_MEMORY_MAPPED_IO,=0D + EFI_RESOURCE_ATTRIBUTE_PRESENT |=0D + EFI_RESOURCE_ATTRIBUTE_INITIALIZED |=0D + EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |=0D + EFI_RESOURCE_ATTRIBUTE_TESTED,=0D + MemoryBase,=0D + MemorySize=0D + );=0D +}=0D +=0D +/**=0D + Populate IO resources from FDT that not added to GCD by its=0D + driver in the DXE phase. =0D +=0D + @param FdtBase Fdt base address=0D + @param Compatible Compatible string=0D +=0D +**/=0D +STATIC=0D +VOID=0D +PopulateIoResources (=0D + VOID *FdtBase,=0D + CONST CHAR8* Compatible=0D + )=0D +{=0D + UINT64 *Reg;=0D + INT32 Node, LenP;=0D +=0D + Node =3D fdt_node_offset_by_compatible (FdtBase, -1, Compatible);=0D + while (Node !=3D -FDT_ERR_NOTFOUND) {=0D + Reg =3D (UINT64 *)fdt_getprop (FdtBase, Node, "reg", &LenP);=0D + if (Reg) {=0D + ASSERT (LenP =3D=3D (2 * sizeof (UINT64)));=0D + AddIoMemoryBaseSizeHob (SwapBytes64 (Reg[0]), SwapBytes64 (Reg[1]));= =0D + }=0D + Node =3D fdt_node_offset_by_compatible (FdtBase, Node, Compatible);=0D + }=0D +}=0D +=0D /**=0D @retval EFI_SUCCESS The address of FDT is passed in HOB.=0D EFI_UNSUPPORTED Can't locate FDT.=0D @@ -80,5 +137,10 @@ PlatformPeimInitialization ( =0D BuildFvHob (PcdGet32 (PcdOvmfDxeMemFvBase), PcdGet32 (PcdOvmfDxeMemFvSiz= e));=0D =0D + PopulateIoResources (Base, "ns16550a");=0D + PopulateIoResources (Base, "qemu,fw-cfg-mmio");=0D + PopulateIoResources (Base, "virtio,mmio");=0D + AddIoMemoryBaseSizeHob (PcdGet32 (PcdOvmfFdBaseAddress), PcdGet32 (PcdOv= mfFirmwareFdSize));=0D +=0D return EFI_SUCCESS;=0D }=0D diff --git a/OvmfPkg/RiscVVirt/Sec/SecMain.inf b/OvmfPkg/RiscVVirt/Sec/SecM= ain.inf index 0e2a5785e8a4..75d5b74b3d3f 100644 --- a/OvmfPkg/RiscVVirt/Sec/SecMain.inf +++ b/OvmfPkg/RiscVVirt/Sec/SecMain.inf @@ -62,6 +62,7 @@ gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamBase=0D gUefiOvmfPkgTokenSpaceGuid.PcdOvmfSecPeiTempRamSize=0D gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFdBaseAddress=0D + gUefiOvmfPkgTokenSpaceGuid.PcdOvmfFirmwareFdSize=0D =0D [Guids]=0D gFdtHobGuid=0D --=20 2.25.1