From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by mx.groups.io with SMTP id smtpd.web11.16069.1685719081815072410 for ; Fri, 02 Jun 2023 08:18:02 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=B/OiuDDa; spf=pass (domain: kernel.org, ip: 139.178.84.217, mailfrom: ardb@kernel.org) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 5218960C6D; Fri, 2 Jun 2023 15:18:01 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 0E5B3C433D2; Fri, 2 Jun 2023 15:17:57 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1685719080; bh=tPQELZp/bOccrU22DrEnY/BkjEJm2OY07qonSxDGOMc=; h=From:To:Cc:Subject:Date:From; b=B/OiuDDao495f0smVyJ8L+66wI6SEVkDvIDlmryv+3ud5llHYJpXgplGbWWhg34m5 JmLhbJhG2W2fbjrUbqqVBzaD94ge10szAaD2NM+4zY7V6XsGtz2rJSCiIXHSI0uEDS c2QY6wMJ1EtWd5FhB+lZEjzz7NVa8aRbaH6h48I7z/AlIINddmNM3ENZmiNJQ48/oU DjPyVoyPYmZ/FyPyJav4BhDcJafT676CY57S3EJcewzg8mc0Ea1BncZ8fLstnnNWld mETFrAb1i748u39xS+GN5FJo9iM8BQuFb2LxquMYlkp2IkvXtU5KoSVQxsW9MHmskI sLEAF8efFEv1w== From: "Ard Biesheuvel" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Ray Ni , Jiewen Yao , Gerd Hoffmann , Taylor Beebe , Oliver Smith-Denny , Dandan Bi , Dun Tan , Liming Gao , "Kinney, Michael D" , Leif Lindholm , Michael Kubacki Subject: [PATCH v2 0/7] Add PPI to manage PEI phase memory attributes Date: Fri, 2 Jun 2023 17:17:32 +0200 Message-Id: <20230602151739.3600820-1-ardb@kernel.org> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4468=0D =0D This is a followup to the RFC that I sent to the edk2-devel list on the=0D 25th of May.=0D =0D In an attempt to make some incremental progress, this v2 only covers the=0D NX remapping of the DXE stack in DxeIpl, using the newly introduced=0D memory attributes PPI.=0D =0D Other use cases are deferred until we can converge on an approach that=0D works across architectures and platforms. In particular, this means the=0D following use cases:=0D - mapping the DXE core code and data regions RO and XP, respectively;=0D - mapping shadowed PEIMs read-only (including the PEI core itself);=0D - managing memory permissions after temporary RAM migration;=0D - reorganizing the X64 PEI flow with respect to page table allocation;=0D - managing the dispatch order of the PEIM producing the PPI in relation=0D to its consumers.=0D =0D The current series specifies the PPI in patch #1, and wires it up into=0D DxeIpl to remap the DXE stack non-executable in a generic manner=0D (patches #2 and #3)=0D =0D Patches #4 and #5 implement the PPI for ARM and AArch64.=0D =0D Patch #6 switches ARM and AArch64 over to the generic DxeIpl.=0D =0D Patch #7 cleans up the ARM implementation of the UEFI memory attributes=0D protocol, based on the improvements made in patch #4. =0D =0D Changes since RFC (in addition to the above):=0D - update PPI protype to use attributes+mask instead of setmask+clearmask=0D - drop OVMF patch for RISC-V that has been applied in the meantime=0D =0D Cc: Ray Ni =0D Cc: Jiewen Yao =0D Cc: Gerd Hoffmann =0D Cc: Taylor Beebe =0D Cc: Oliver Smith-Denny =0D Cc: Dandan Bi =0D Cc: Dun Tan =0D Cc: Liming Gao =0D Cc: "Kinney, Michael D" =0D Cc: Leif Lindholm =0D Cc: Michael Kubacki =0D =0D Ard Biesheuvel (7):=0D MdeModulePkg: Define memory attribute PPI=0D MdeModulePkg/DxeIpl: Merge EBC, RISCV64 and LOONGARCH code=0D MdeModulePkg/DxeIpl: Use memory attribute PPI to remap the stack NX=0D ArmPkg/ArmMmuLib: Extend API to manage memory permissions better=0D ArmPkg/CpuPei: Implement the memory attributes PPI=0D MdeModulePkg/DxeIpl ARM AARCH64: Switch to generic handoff code=0D ArmPkg/CpuDxe: Simplify memory attributes protocol implementation=0D =0D ArmPkg/Drivers/CpuDxe/CpuMmuCommon.c | 2 +-=0D ArmPkg/Drivers/CpuDxe/MemoryAttribute.c | 50 +---= -------=0D ArmPkg/Drivers/CpuPei/CpuPei.c | 76 ++++= +++++++++++++=0D ArmPkg/Drivers/CpuPei/CpuPei.inf | 4 +=0D ArmPkg/Include/Library/ArmMmuLib.h | 36 ++++= +++-=0D ArmPkg/Library/ArmMmuLib/AArch64/ArmMmuLibCore.c | 52 ++++= +++++++-=0D ArmPkg/Library/ArmMmuLib/Arm/ArmMmuLibUpdate.c | 88 ++++= +++++++++++++---=0D ArmPkg/Library/OpteeLib/Optee.c | 2 +-=0D MdeModulePkg/Core/DxeIplPeim/Arm/DxeLoadFunc.c | 71 ----= ------------=0D MdeModulePkg/Core/DxeIplPeim/{Ebc/DxeLoadFunc.c =3D> DxeHandoff.c} | 31 ++= ++++-=0D MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf | 24 ++--= --=0D MdeModulePkg/Core/DxeIplPeim/LoongArch64/DxeLoadFunc.c | 63 ----= ----------=0D MdeModulePkg/Core/DxeIplPeim/RiscV64/DxeLoadFunc.c | 75 ----= -------------=0D MdeModulePkg/Include/Ppi/MemoryAttribute.h | 83 ++++= ++++++++++++++=0D MdeModulePkg/MdeModulePkg.dec | 3 +=0D 15 files changed, 366 insertions(+), 294 deletions(-)=0D delete mode 100644 MdeModulePkg/Core/DxeIplPeim/Arm/DxeLoadFunc.c=0D rename MdeModulePkg/Core/DxeIplPeim/{Ebc/DxeLoadFunc.c =3D> DxeHandoff.c} = (62%)=0D delete mode 100644 MdeModulePkg/Core/DxeIplPeim/LoongArch64/DxeLoadFunc.c= =0D delete mode 100644 MdeModulePkg/Core/DxeIplPeim/RiscV64/DxeLoadFunc.c=0D create mode 100644 MdeModulePkg/Include/Ppi/MemoryAttribute.h=0D =0D -- =0D 2.39.2=0D =0D