From: "Marcin Juszkiewicz" <marcin.juszkiewicz@linaro.org>
To: devel@edk2.groups.io
Cc: Sami Mujawar <sami.mujawar@arm.com>,
Ard Biesheuvel <ardb+tianocore@kernel.org>,
Leif Lindholm <quic_llindhol@quicinc.com>,
Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
Subject: [PATCH v2 7/8] ArmPkg: cleaning output of ArmCpuInfo
Date: Mon, 5 Jun 2023 08:37:42 +0200 [thread overview]
Message-ID: <20230605063743.405487-9-marcin.juszkiewicz@linaro.org> (raw)
In-Reply-To: <20230605063743.405487-1-marcin.juszkiewicz@linaro.org>
There is no point of having double spaces.
Signed-off-by: Marcin Juszkiewicz <marcin.juszkiewicz@linaro.org>
---
ArmPkg/Application/ArmCpuInfo/ArmCpuInfo.c | 24 +++++++++++-----------
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/ArmPkg/Application/ArmCpuInfo/ArmCpuInfo.c b/ArmPkg/Application/ArmCpuInfo/ArmCpuInfo.c
index ab1cc70933e1..caaab4ec4313 100644
--- a/ArmPkg/Application/ArmCpuInfo/ArmCpuInfo.c
+++ b/ArmPkg/Application/ArmCpuInfo/ArmCpuInfo.c
@@ -659,7 +659,7 @@ HandleAa64Isar1 (
Value = (Aa64Isar1 >> 4) & 0xf;
switch (Value) {
case b0000:
- Description = "Address Authentication (APA) not implemented.";
+ Description = "Address Authentication (APA) not implemented.";
break;
case b0001:
Description = "FEAT_PAuth implemented.";
@@ -690,7 +690,7 @@ HandleAa64Isar1 (
Value = (Aa64Isar1 >> 8) & 0xf;
switch (Value) {
case b0000:
- Description = "Address Authentication (API) not implemented.";
+ Description = "Address Authentication (API) not implemented.";
break;
case b0001:
Description = "FEAT_PAuth implemented.";
@@ -1005,7 +1005,7 @@ HandleAa64Isar2 (
Value = (Aa64Isar2 >> 12) & 0xf;
switch (Value) {
case b0000:
- Description = "Address Authentication (APA3) not implemented.";
+ Description = "Address Authentication (APA3) not implemented.";
break;
case b0001:
Description = "FEAT_PAuth implemented.";
@@ -1099,25 +1099,25 @@ HandleAa64Mmfr0 (
Value = Aa64Mmfr0 & 0xf;
switch (Value) {
case b0000:
- Description = "32 Bits (4GB) of physical address range supported.";
+ Description = "32 Bits (4GB) of physical address range supported.";
break;
case b0001:
- Description = "36 Bits (64GB) of physical address range supported.";
+ Description = "36 Bits (64GB) of physical address range supported.";
break;
case b0010:
- Description = "40 Bits (1TB) of physical address range supported.";
+ Description = "40 Bits (1TB) of physical address range supported.";
break;
case b0011:
- Description = "42 Bits (4TB) of physical address range supported.";
+ Description = "42 Bits (4TB) of physical address range supported.";
break;
case b0100:
- Description = "44 Bits (16TB) of physical address range supported.";
+ Description = "44 Bits (16TB) of physical address range supported.";
break;
case b0101:
- Description = "48 Bits (256TB) of physical address range supported.";
+ Description = "48 Bits (256TB) of physical address range supported.";
break;
case b0110:
- Description = "52 Bits (4PB) of physical address range supported.";
+ Description = "52 Bits (4PB) of physical address range supported.";
break;
default:
Description = "unknown";
@@ -1982,7 +1982,7 @@ HandleAa64Pfr0 (
Description = "Floating-point implemented.";
break;
case b0001:
- Description = "Floating-point with half-precision support (FEAT_FP16).";
+ Description = "Floating-point with half-precision support (FEAT_FP16).";
break;
case b1111:
Description = "Floating-point not implemented.";
@@ -2001,7 +2001,7 @@ HandleAa64Pfr0 (
Description = "Advanced SIMD implemented.";
break;
case b0001:
- Description = "Advanced SIMD with half precision support (FEAT_FP16).";
+ Description = "Advanced SIMD with half precision support (FEAT_FP16).";
break;
case b1111:
Description = "Advanced SIMD not implemented.";
--
2.40.1
next prev parent reply other threads:[~2023-06-05 6:38 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-05 6:37 [PATCH v2 0/8] ArmCpuInfo improvements Marcin Juszkiewicz
2023-06-05 6:37 ` [PATCH v2 1/1] ArmPkg: add SMC defines for SiP service calls Marcin Juszkiewicz
2023-06-05 6:37 ` [PATCH v2 1/8] ArmPkg: fix reading of first nibbles in ArmCpuInfo Marcin Juszkiewicz
2023-06-05 6:37 ` [PATCH v2 2/8] ArmPkg: shorten register field " Marcin Juszkiewicz
2023-06-05 6:37 ` [PATCH v2 3/8] ArmPkg: add functions to read SVE/SME info Marcin Juszkiewicz
2023-06-05 6:37 ` [PATCH v2 4/8] ArmPkg: skip empty system registers in ArmCpuInfo Marcin Juszkiewicz
2023-06-05 6:37 ` [PATCH v2 5/8] ArmPkg: format output in one place " Marcin Juszkiewicz
2023-06-05 6:37 ` [PATCH v2 6/8] ArmPkg: handle SVE/SME " Marcin Juszkiewicz
2023-06-05 6:37 ` Marcin Juszkiewicz [this message]
2023-06-05 6:37 ` [PATCH v2 8/8] ArmPkg: show stage2 granule support on Neoverse-N1 Marcin Juszkiewicz
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