* [PATCH 0/3] use XHCI to replace EHCI @ 2023-06-05 10:49 wangyuquan1236 2023-06-05 10:49 ` [PATCH 1/3] Platform/Qemu/SbsaQemu/SbsaQemu.dsc: define XHCI Pcd settings wangyuquan1236 ` (3 more replies) 0 siblings, 4 replies; 10+ messages in thread From: wangyuquan1236 @ 2023-06-05 10:49 UTC (permalink / raw) To: ardb+tianocore, quic_llindhol Cc: quic_ggregory, rad, chenbaozi, devel, Yuquan Wang This patchset implements XHCI on sbsa-ref board to replace EHCI. As sbsa-ref does not have DRAM below 4G, it cannot utilize EHCI that only has 32-bit DMA capablity. Now this board has XHCI as an available usb controller with 64-bit DMA capablity. Yuquan Wang (3): Platform/Qemu/SbsaQemu/SbsaQemu.dsc: define XHCI Pcd settings SbsaQemu: Drivers: Add initial support for XHCI SbsaQemu: AcpiTables: Add XHCI info into DSDT Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 6 +- .../Qemu/SbsaQemu/AcpiTables/AcpiTables.inf | 4 +- Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl | 125 ++---------------- .../SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c | 40 ++++-- .../SbsaQemuPlatformDxe.inf | 2 + Silicon/Qemu/SbsaQemu/SbsaQemu.dec | 4 +- 6 files changed, 53 insertions(+), 128 deletions(-) -- 2.34.1 ^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH 1/3] Platform/Qemu/SbsaQemu/SbsaQemu.dsc: define XHCI Pcd settings 2023-06-05 10:49 [PATCH 0/3] use XHCI to replace EHCI wangyuquan1236 @ 2023-06-05 10:49 ` wangyuquan1236 2023-06-05 10:49 ` [PATCH 2/3] SbsaQemu: Drivers: Add initial support for XHCI wangyuquan1236 ` (2 subsequent siblings) 3 siblings, 0 replies; 10+ messages in thread From: wangyuquan1236 @ 2023-06-05 10:49 UTC (permalink / raw) To: ardb+tianocore, quic_llindhol Cc: quic_ggregory, rad, chenbaozi, devel, Yuquan Wang Define the pcd settings for identifying the base address of XHCI and XHCI's mmio size, and remove relevant EHCI settings. Signed-off-by: Yuquan Wang <wangyuquan1236@phytium.com.cn> Change-Id: Ic144e7125332de5f2f2151f3b6856bd095c95a58 --- Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc index 79dd200c..7ffe8635 100644 --- a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc +++ b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc @@ -435,11 +435,11 @@ DEFINE NETWORK_HTTP_BOOT_ENABLE = FALSE # Initial Device Tree Location gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress|0x10000000000 - # Non discoverable devices (AHCI,EHCI) + # Non discoverable devices (AHCI,XHCI) gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformAhciBase|0x60100000 gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformAhciSize|0x00010000 - gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformEhciBase|0x60110000 - gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformEhciSize|0x00010000 + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformXhciBase|0x60110000 + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformXhciSize|0x00010000 # PL011 - Serial Terminal gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x60000000 -- 2.34.1 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 2/3] SbsaQemu: Drivers: Add initial support for XHCI 2023-06-05 10:49 [PATCH 0/3] use XHCI to replace EHCI wangyuquan1236 2023-06-05 10:49 ` [PATCH 1/3] Platform/Qemu/SbsaQemu/SbsaQemu.dsc: define XHCI Pcd settings wangyuquan1236 @ 2023-06-05 10:49 ` wangyuquan1236 2023-06-05 10:49 ` [PATCH 3/3] SbsaQemu: AcpiTables: Add XHCI info into DSDT wangyuquan1236 2023-06-05 10:51 ` [PATCH 0/3] use XHCI to replace EHCI Ard Biesheuvel 3 siblings, 0 replies; 10+ messages in thread From: wangyuquan1236 @ 2023-06-05 10:49 UTC (permalink / raw) To: ardb+tianocore, quic_llindhol Cc: quic_ggregory, rad, chenbaozi, devel, Yuquan Wang This registers the non-discoverable XHCI for sbsa-ref. Signed-off-by: Yuquan Wang <wangyuquan1236@phytium.com.cn> Change-Id: Iace5a04ea6087de6b0d855e84c90b4754a66594a --- .../SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c | 40 ++++++++++++++----- .../SbsaQemuPlatformDxe.inf | 2 + Silicon/Qemu/SbsaQemu/SbsaQemu.dec | 4 +- 3 files changed, 35 insertions(+), 11 deletions(-) diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c index b7270a07..1a34773f 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c @@ -24,18 +24,19 @@ InitializeSbsaQemuPlatformDxe ( ) { EFI_STATUS Status; - UINTN Size; - VOID* Base; + UINTN AhciSize, XhciSize; + VOID* AhciBase; + VOID* XhciBase; DEBUG ((DEBUG_INFO, "%a: InitializeSbsaQemuPlatformDxe called\n", __FUNCTION__)); - Base = (VOID*)(UINTN)PcdGet64 (PcdPlatformAhciBase); - ASSERT (Base != NULL); - Size = (UINTN)PcdGet32 (PcdPlatformAhciSize); - ASSERT (Size != 0); + AhciBase = (VOID*)(UINTN)PcdGet64 (PcdPlatformAhciBase); + ASSERT (AhciBase != NULL); + AhciSize = (UINTN)PcdGet32 (PcdPlatformAhciSize); + ASSERT (AhciSize != 0); DEBUG ((DEBUG_INFO, "%a: Got platform AHCI %llx %u\n", - __FUNCTION__, Base, Size)); + __FUNCTION__, AhciBase, AhciSize)); Status = RegisterNonDiscoverableMmioDevice ( NonDiscoverableDeviceTypeAhci, @@ -43,13 +44,34 @@ InitializeSbsaQemuPlatformDxe ( NULL, NULL, 1, - Base, Size); + AhciBase, AhciSize); if (EFI_ERROR(Status)) { DEBUG ((DEBUG_ERROR, "%a: NonDiscoverable: Cannot install AHCI device @%p (Staus == %r)\n", - __FUNCTION__, Base, Status)); + __FUNCTION__, AhciBase, Status)); return Status; } + XhciBase = (VOID*)(UINTN)PcdGet64 (PcdPlatformXhciBase); + ASSERT (XhciBase != NULL); + XhciSize = (UINTN)PcdGet32 (PcdPlatformXhciSize); + ASSERT (XhciSize != 0); + + DEBUG ((DEBUG_INFO, "%a: Got platform XHCI %llx %u\n", + __FUNCTION__, XhciBase, XhciSize)); + + Status = RegisterNonDiscoverableMmioDevice ( + NonDiscoverableDeviceTypeXhci, + NonDiscoverableDeviceDmaTypeCoherent, + NULL, + NULL, + 1, + XhciBase, XhciSize); + + if (EFI_ERROR(Status)) { + DEBUG ((DEBUG_ERROR, "%a: NonDiscoverable: Cannot install XHCI device @%p (Staus == %r)\n", + __FUNCTION__, XhciBase, Status)); + return Status; + } return EFI_SUCCESS; } diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf index 21d2135f..41cdcf16 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf @@ -35,6 +35,8 @@ [Pcd] gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformAhciBase gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformAhciSize + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformXhciBase + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformXhciSize [Depex] TRUE diff --git a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec b/Silicon/Qemu/SbsaQemu/SbsaQemu.dec index 94488529..028c2974 100644 --- a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec +++ b/Silicon/Qemu/SbsaQemu/SbsaQemu.dec @@ -32,8 +32,8 @@ # Non discoverable devices Pcds gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformAhciBase|0|UINT64|0x00000001 gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformAhciSize|0x10000|UINT32|0x00000002 - gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformEhciBase|0|UINT64|0x00000003 - gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformEhciSize|0x10000|UINT32|0x00000004 + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformXhciBase|0|UINT64|0x00000003 + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformXhciSize|0x10000|UINT32|0x00000004 gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress|0x10000000000|UINT64|0x00000005 # PCDs complementing PCIe layout pulled into ACPI tables -- 2.34.1 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* [PATCH 3/3] SbsaQemu: AcpiTables: Add XHCI info into DSDT 2023-06-05 10:49 [PATCH 0/3] use XHCI to replace EHCI wangyuquan1236 2023-06-05 10:49 ` [PATCH 1/3] Platform/Qemu/SbsaQemu/SbsaQemu.dsc: define XHCI Pcd settings wangyuquan1236 2023-06-05 10:49 ` [PATCH 2/3] SbsaQemu: Drivers: Add initial support for XHCI wangyuquan1236 @ 2023-06-05 10:49 ` wangyuquan1236 2023-06-05 10:51 ` [PATCH 0/3] use XHCI to replace EHCI Ard Biesheuvel 3 siblings, 0 replies; 10+ messages in thread From: wangyuquan1236 @ 2023-06-05 10:49 UTC (permalink / raw) To: ardb+tianocore, quic_llindhol Cc: quic_ggregory, rad, chenbaozi, devel, Yuquan Wang As sbsa-ref board uses xhci to replace ehci, the DSDT is updated to match the platform xhci controller. This also removes previous ehci structure. Signed-off-by: Yuquan Wang <wangyuquan1236@phytium.com.cn> Change-Id: I7f7d6f69e3091f036ff086722ea5847ba2a1e27c --- .../Qemu/SbsaQemu/AcpiTables/AcpiTables.inf | 4 +- Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl | 125 ++---------------- 2 files changed, 15 insertions(+), 114 deletions(-) diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf b/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf index 176d8fab..f9caca96 100644 --- a/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf +++ b/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf @@ -72,5 +72,5 @@ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformAhciBase gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformAhciSize - gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformEhciBase - gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformEhciSize + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformXhciBase + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformXhciSize diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl b/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl index 33579165..b4ef2c1f 100644 --- a/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl +++ b/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl @@ -68,120 +68,21 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", } } - // USB EHCI Host Controller - Device (USB0) { - Name (_HID, "LNRO0D20") - Name (_CID, "PNP0D20") + // USB XHCI Host Controller + Device (XHCI) { + Name (_HID, "PNP0D10") // _HID: Hardware ID + Name (_UID, 0x00) // _UID: Unique ID + Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute + Name (_CRS, ResourceTemplate() { + Memory32Fixed (ReadWrite, + FixedPcdGet32 (PcdPlatformXhciBase), + FixedPcdGet32 (PcdPlatformXhciSize)) + Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 43 } + }) Method (_STA) { - Return (0xF) - } - Method (_CRS, 0x0, Serialized) { - Name (RBUF, ResourceTemplate() { - Memory32Fixed (ReadWrite, - FixedPcdGet32 (PcdPlatformEhciBase), - FixedPcdGet32 (PcdPlatformEhciSize)) - Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 43 } - }) - Return (RBUF) + Return (0xF) } - - // Root Hub - Device (RHUB) { - Name (_ADR, 0x00000000) // Address of Root Hub should be 0 as per ACPI 5.0 spec - Method (_STA) { - Return (0xF) - } - - // Ports connected to Root Hub - Device (HUB1) { - Name (_ADR, 0x00000001) - Name (_UPC, Package() { - 0x00, // Port is NOT connectable - 0xFF, // Don't care - 0x00000000, // Reserved 0 must be zero - 0x00000000 // Reserved 1 must be zero - }) - Method (_STA) { - Return (0xF) - } - - Device (PRT1) { - Name (_ADR, 0x00000001) - Name (_UPC, Package() { - 0xFF, // Port is connectable - 0x00, // Port connector is A - 0x00000000, - 0x00000000 - }) - Name (_PLD, Package() { - Buffer(0x10) { - 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 - } - }) - Method (_STA) { - Return (0xF) - } - } // USB0_RHUB_HUB1_PRT1 - Device (PRT2) { - Name (_ADR, 0x00000002) - Name (_UPC, Package() { - 0xFF, // Port is connectable - 0x00, // Port connector is A - 0x00000000, - 0x00000000 - }) - Name (_PLD, Package() { - Buffer(0x10) { - 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 - } - }) - Method (_STA) { - Return (0xF) - } - } // USB0_RHUB_HUB1_PRT2 - - Device (PRT3) { - Name (_ADR, 0x00000003) - Name (_UPC, Package() { - 0xFF, // Port is connectable - 0x00, // Port connector is A - 0x00000000, - 0x00000000 - }) - Name (_PLD, Package() { - Buffer (0x10) { - 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 - } - }) - Method (_STA) { - Return (0xF) - } - } // USB0_RHUB_HUB1_PRT3 - - Device (PRT4) { - Name (_ADR, 0x00000004) - Name (_UPC, Package() { - 0xFF, // Port is connectable - 0x00, // Port connector is A - 0x00000000, - 0x00000000 - }) - Name (_PLD, Package() { - Buffer (0x10){ - 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 - } - }) - Method (_STA) { - Return (0xF) - } - } // USB0_RHUB_HUB1_PRT4 - } // USB0_RHUB_HUB1 - } // USB0_RHUB - } // USB0 + } Device (PCI0) { -- 2.34.1 ^ permalink raw reply related [flat|nested] 10+ messages in thread
* Re: [PATCH 0/3] use XHCI to replace EHCI 2023-06-05 10:49 [PATCH 0/3] use XHCI to replace EHCI wangyuquan1236 ` (2 preceding siblings ...) 2023-06-05 10:49 ` [PATCH 3/3] SbsaQemu: AcpiTables: Add XHCI info into DSDT wangyuquan1236 @ 2023-06-05 10:51 ` Ard Biesheuvel 2023-06-05 10:53 ` [edk2-devel] " wangyuquan1236 2023-06-05 12:18 ` Leif Lindholm 3 siblings, 2 replies; 10+ messages in thread From: Ard Biesheuvel @ 2023-06-05 10:51 UTC (permalink / raw) To: Yuquan Wang Cc: ardb+tianocore, quic_llindhol, quic_ggregory, rad, chenbaozi, devel On Mon, 5 Jun 2023 at 12:50, Yuquan Wang <wangyuquan1236@phytium.com.cn> wrote: > > This patchset implements XHCI on sbsa-ref board to replace EHCI. > As sbsa-ref does not have DRAM below 4G, it cannot utilize EHCI > that only has 32-bit DMA capablity. Now this board has XHCI as > an available usb controller with 64-bit DMA capablity. > > Yuquan Wang (3): > Platform/Qemu/SbsaQemu/SbsaQemu.dsc: define XHCI Pcd settings > SbsaQemu: Drivers: Add initial support for XHCI > SbsaQemu: AcpiTables: Add XHCI info into DSDT > Why are you sending the same series 3 times within an hour? > Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 6 +- > .../Qemu/SbsaQemu/AcpiTables/AcpiTables.inf | 4 +- > Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl | 125 ++---------------- > .../SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c | 40 ++++-- > .../SbsaQemuPlatformDxe.inf | 2 + > Silicon/Qemu/SbsaQemu/SbsaQemu.dec | 4 +- > 6 files changed, 53 insertions(+), 128 deletions(-) > > -- > 2.34.1 > ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [edk2-devel] [PATCH 0/3] use XHCI to replace EHCI 2023-06-05 10:51 ` [PATCH 0/3] use XHCI to replace EHCI Ard Biesheuvel @ 2023-06-05 10:53 ` wangyuquan1236 2023-06-05 10:54 ` Ard Biesheuvel 2023-06-05 12:18 ` Leif Lindholm 1 sibling, 1 reply; 10+ messages in thread From: wangyuquan1236 @ 2023-06-05 10:53 UTC (permalink / raw) To: Ard Biesheuvel, devel [-- Attachment #1: Type: text/plain, Size: 129 bytes --] Sorry for my awkward operations, because I felt the email refused problem with devel@edk2.groups.io; ( devel@edk2.groups.io, ) [-- Attachment #2: Type: text/html, Size: 323 bytes --] ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [edk2-devel] [PATCH 0/3] use XHCI to replace EHCI 2023-06-05 10:53 ` [edk2-devel] " wangyuquan1236 @ 2023-06-05 10:54 ` Ard Biesheuvel 2023-06-05 10:58 ` wangyuquan1236 0 siblings, 1 reply; 10+ messages in thread From: Ard Biesheuvel @ 2023-06-05 10:54 UTC (permalink / raw) To: wangyuquan1236; +Cc: devel On Mon, 5 Jun 2023 at 12:53, wangyuquan1236 <wangyuquan1236@phytium.com.cn> wrote: > > Sorry for my awkward operations, because I felt the email refused problem with devel@edk2.groups.io; Are you subscribed to the mailing list? ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [edk2-devel] [PATCH 0/3] use XHCI to replace EHCI 2023-06-05 10:54 ` Ard Biesheuvel @ 2023-06-05 10:58 ` wangyuquan1236 0 siblings, 0 replies; 10+ messages in thread From: wangyuquan1236 @ 2023-06-05 10:58 UTC (permalink / raw) To: Ard Biesheuvel, devel [-- Attachment #1: Type: text/plain, Size: 148 bytes --] Yes, at the third time I found I need to subscribe this channel, so I succeeded. Now, I can send the patch normally. Thanks for your guidance. [-- Attachment #2: Type: text/html, Size: 210 bytes --] ^ permalink raw reply [flat|nested] 10+ messages in thread
* Re: [edk2-devel] [PATCH 0/3] use XHCI to replace EHCI 2023-06-05 10:51 ` [PATCH 0/3] use XHCI to replace EHCI Ard Biesheuvel 2023-06-05 10:53 ` [edk2-devel] " wangyuquan1236 @ 2023-06-05 12:18 ` Leif Lindholm 1 sibling, 0 replies; 10+ messages in thread From: Leif Lindholm @ 2023-06-05 12:18 UTC (permalink / raw) To: devel, ardb, Yuquan Wang; +Cc: ardb+tianocore, quic_ggregory, rad, chenbaozi On 2023-06-05 11:51, Ard Biesheuvel wrote: > On Mon, 5 Jun 2023 at 12:50, Yuquan Wang <wangyuquan1236@phytium.com.cn> wrote: >> >> This patchset implements XHCI on sbsa-ref board to replace EHCI. >> As sbsa-ref does not have DRAM below 4G, it cannot utilize EHCI >> that only has 32-bit DMA capablity. Now this board has XHCI as >> an available usb controller with 64-bit DMA capablity. >> >> Yuquan Wang (3): >> Platform/Qemu/SbsaQemu/SbsaQemu.dsc: define XHCI Pcd settings >> SbsaQemu: Drivers: Add initial support for XHCI >> SbsaQemu: AcpiTables: Add XHCI info into DSDT >> > > Why are you sending the same series 3 times within an hour? I think there was unfortunate timing with my releasing from moderation and unmoderating Yuquan and them resubmitting because they didn't see patches hitting the list. / Leif >> Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 6 +- >> .../Qemu/SbsaQemu/AcpiTables/AcpiTables.inf | 4 +- >> Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl | 125 ++---------------- >> .../SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c | 40 ++++-- >> .../SbsaQemuPlatformDxe.inf | 2 + >> Silicon/Qemu/SbsaQemu/SbsaQemu.dec | 4 +- >> 6 files changed, 53 insertions(+), 128 deletions(-) >> >> -- >> 2.34.1 >> > > > > > ^ permalink raw reply [flat|nested] 10+ messages in thread
[parent not found: <20230605085501.36945-1-wangyuquan1236@phytium.com.cn>]
[parent not found: <20230605085501.36945-2-wangyuquan1236@phytium.com.cn>]
* Re: [PATCH 1/3] Platform/Qemu/SbsaQemu/SbsaQemu.dsc: define XHCI Pcd settings [not found] ` <20230605085501.36945-2-wangyuquan1236@phytium.com.cn> @ 2023-06-05 12:07 ` chenbaozi 0 siblings, 0 replies; 10+ messages in thread From: chenbaozi @ 2023-06-05 12:07 UTC (permalink / raw) To: Yuquan Wang; +Cc: ardb+tianocore, Leif Lindholm, quic_ggregory, rad, devel Hi, Yuquan > On Jun 5, 2023, at 16:54, Yuquan Wang <wangyuquan1236@phytium.com.cn> wrote: > > Define the pcd settings for identifying the base address of XHCI > and XHCI's mmio size, and remove relevant EHCI settings. > > Signed-off-by: Yuquan Wang <wangyuquan1236@phytium.com.cn> > Change-Id: Ic144e7125332de5f2f2151f3b6856bd095c95a58 Please remove Change-Id, which is used for the Gerrit internally. Cheers, Baozi. ^ permalink raw reply [flat|nested] 10+ messages in thread
end of thread, other threads:[~2023-06-05 12:18 UTC | newest] Thread overview: 10+ messages (download: mbox.gz follow: Atom feed -- links below jump to the message on this page -- 2023-06-05 10:49 [PATCH 0/3] use XHCI to replace EHCI wangyuquan1236 2023-06-05 10:49 ` [PATCH 1/3] Platform/Qemu/SbsaQemu/SbsaQemu.dsc: define XHCI Pcd settings wangyuquan1236 2023-06-05 10:49 ` [PATCH 2/3] SbsaQemu: Drivers: Add initial support for XHCI wangyuquan1236 2023-06-05 10:49 ` [PATCH 3/3] SbsaQemu: AcpiTables: Add XHCI info into DSDT wangyuquan1236 2023-06-05 10:51 ` [PATCH 0/3] use XHCI to replace EHCI Ard Biesheuvel 2023-06-05 10:53 ` [edk2-devel] " wangyuquan1236 2023-06-05 10:54 ` Ard Biesheuvel 2023-06-05 10:58 ` wangyuquan1236 2023-06-05 12:18 ` Leif Lindholm [not found] <20230605085501.36945-1-wangyuquan1236@phytium.com.cn> [not found] ` <20230605085501.36945-2-wangyuquan1236@phytium.com.cn> 2023-06-05 12:07 ` [PATCH 1/3] Platform/Qemu/SbsaQemu/SbsaQemu.dsc: define XHCI Pcd settings chenbaozi
This is a public inbox, see mirroring instructions for how to clone and mirror all data and code used for this inbox