From: "wangyuquan1236" <wangyuquan1236@phytium.com.cn>
To: ardb+tianocore@kernel.org, quic_llindhol@quicinc.com
Cc: quic_ggregory@quicinc.com, rad@semihalf.com,
chenbaozi@phytium.com.cn, devel@edk2.groups.io,
Yuquan Wang <wangyuquan1236@phytium.com.cn>
Subject: [PATCH 2/3] SbsaQemu: Drivers: Add initial support for XHCI
Date: Mon, 5 Jun 2023 18:49:12 +0800 [thread overview]
Message-ID: <20230605104913.117643-3-wangyuquan1236@phytium.com.cn> (raw)
In-Reply-To: <20230605104913.117643-1-wangyuquan1236@phytium.com.cn>
This registers the non-discoverable XHCI for sbsa-ref.
Signed-off-by: Yuquan Wang <wangyuquan1236@phytium.com.cn>
Change-Id: Iace5a04ea6087de6b0d855e84c90b4754a66594a
---
.../SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c | 40 ++++++++++++++-----
.../SbsaQemuPlatformDxe.inf | 2 +
Silicon/Qemu/SbsaQemu/SbsaQemu.dec | 4 +-
3 files changed, 35 insertions(+), 11 deletions(-)
diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c
index b7270a07..1a34773f 100644
--- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c
+++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c
@@ -24,18 +24,19 @@ InitializeSbsaQemuPlatformDxe (
)
{
EFI_STATUS Status;
- UINTN Size;
- VOID* Base;
+ UINTN AhciSize, XhciSize;
+ VOID* AhciBase;
+ VOID* XhciBase;
DEBUG ((DEBUG_INFO, "%a: InitializeSbsaQemuPlatformDxe called\n", __FUNCTION__));
- Base = (VOID*)(UINTN)PcdGet64 (PcdPlatformAhciBase);
- ASSERT (Base != NULL);
- Size = (UINTN)PcdGet32 (PcdPlatformAhciSize);
- ASSERT (Size != 0);
+ AhciBase = (VOID*)(UINTN)PcdGet64 (PcdPlatformAhciBase);
+ ASSERT (AhciBase != NULL);
+ AhciSize = (UINTN)PcdGet32 (PcdPlatformAhciSize);
+ ASSERT (AhciSize != 0);
DEBUG ((DEBUG_INFO, "%a: Got platform AHCI %llx %u\n",
- __FUNCTION__, Base, Size));
+ __FUNCTION__, AhciBase, AhciSize));
Status = RegisterNonDiscoverableMmioDevice (
NonDiscoverableDeviceTypeAhci,
@@ -43,13 +44,34 @@ InitializeSbsaQemuPlatformDxe (
NULL,
NULL,
1,
- Base, Size);
+ AhciBase, AhciSize);
if (EFI_ERROR(Status)) {
DEBUG ((DEBUG_ERROR, "%a: NonDiscoverable: Cannot install AHCI device @%p (Staus == %r)\n",
- __FUNCTION__, Base, Status));
+ __FUNCTION__, AhciBase, Status));
return Status;
}
+ XhciBase = (VOID*)(UINTN)PcdGet64 (PcdPlatformXhciBase);
+ ASSERT (XhciBase != NULL);
+ XhciSize = (UINTN)PcdGet32 (PcdPlatformXhciSize);
+ ASSERT (XhciSize != 0);
+
+ DEBUG ((DEBUG_INFO, "%a: Got platform XHCI %llx %u\n",
+ __FUNCTION__, XhciBase, XhciSize));
+
+ Status = RegisterNonDiscoverableMmioDevice (
+ NonDiscoverableDeviceTypeXhci,
+ NonDiscoverableDeviceDmaTypeCoherent,
+ NULL,
+ NULL,
+ 1,
+ XhciBase, XhciSize);
+
+ if (EFI_ERROR(Status)) {
+ DEBUG ((DEBUG_ERROR, "%a: NonDiscoverable: Cannot install XHCI device @%p (Staus == %r)\n",
+ __FUNCTION__, XhciBase, Status));
+ return Status;
+ }
return EFI_SUCCESS;
}
diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf
index 21d2135f..41cdcf16 100644
--- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf
+++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf
@@ -35,6 +35,8 @@
[Pcd]
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformAhciBase
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformAhciSize
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformXhciBase
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformXhciSize
[Depex]
TRUE
diff --git a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec b/Silicon/Qemu/SbsaQemu/SbsaQemu.dec
index 94488529..028c2974 100644
--- a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec
+++ b/Silicon/Qemu/SbsaQemu/SbsaQemu.dec
@@ -32,8 +32,8 @@
# Non discoverable devices Pcds
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformAhciBase|0|UINT64|0x00000001
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformAhciSize|0x10000|UINT32|0x00000002
- gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformEhciBase|0|UINT64|0x00000003
- gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformEhciSize|0x10000|UINT32|0x00000004
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformXhciBase|0|UINT64|0x00000003
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformXhciSize|0x10000|UINT32|0x00000004
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress|0x10000000000|UINT64|0x00000005
# PCDs complementing PCIe layout pulled into ACPI tables
--
2.34.1
next prev parent reply other threads:[~2023-06-05 10:50 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-05 10:49 [PATCH 0/3] use XHCI to replace EHCI wangyuquan1236
2023-06-05 10:49 ` [PATCH 1/3] Platform/Qemu/SbsaQemu/SbsaQemu.dsc: define XHCI Pcd settings wangyuquan1236
2023-06-05 10:49 ` wangyuquan1236 [this message]
2023-06-05 10:49 ` [PATCH 3/3] SbsaQemu: AcpiTables: Add XHCI info into DSDT wangyuquan1236
2023-06-05 10:51 ` [PATCH 0/3] use XHCI to replace EHCI Ard Biesheuvel
2023-06-05 10:53 ` [edk2-devel] " wangyuquan1236
2023-06-05 10:54 ` Ard Biesheuvel
2023-06-05 10:58 ` wangyuquan1236
2023-06-05 12:18 ` Leif Lindholm
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-list from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20230605104913.117643-3-wangyuquan1236@phytium.com.cn \
--to=devel@edk2.groups.io \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox