* [PATCH v1 2/3] SbsaQemu: Drivers: Add initial support for XHCI
2023-06-05 12:47 [PATCH v1 0/3] use XHCI to replace EHCI wangyuquan1236
2023-06-05 12:47 ` [PATCH v1 1/3] Platform/Qemu/SbsaQemu/SbsaQemu.dsc: define XHCI Pcd settings wangyuquan1236
@ 2023-06-05 12:47 ` wangyuquan1236
2023-06-05 12:47 ` [PATCH v1 3/3] SbsaQemu: AcpiTables: Add XHCI info into DSDT wangyuquan1236
2023-06-05 12:53 ` [PATCH v1 0/3] use XHCI to replace EHCI Ard Biesheuvel
3 siblings, 0 replies; 5+ messages in thread
From: wangyuquan1236 @ 2023-06-05 12:47 UTC (permalink / raw)
To: ardb+tianocore, quic_llindhol
Cc: quic_ggregory, rad, devel, chenbaozi, marcin.juszkiewicz,
peter.maydell, Yuquan Wang
This registers the non-discoverable XHCI for sbsa-ref.
Signed-off-by: Yuquan Wang <wangyuquan1236@phytium.com.cn>
---
.../SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c | 40 ++++++++++++++-----
.../SbsaQemuPlatformDxe.inf | 2 +
Silicon/Qemu/SbsaQemu/SbsaQemu.dec | 4 +-
3 files changed, 35 insertions(+), 11 deletions(-)
diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c
index b7270a07..1a34773f 100644
--- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c
+++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c
@@ -24,18 +24,19 @@ InitializeSbsaQemuPlatformDxe (
)
{
EFI_STATUS Status;
- UINTN Size;
- VOID* Base;
+ UINTN AhciSize, XhciSize;
+ VOID* AhciBase;
+ VOID* XhciBase;
DEBUG ((DEBUG_INFO, "%a: InitializeSbsaQemuPlatformDxe called\n", __FUNCTION__));
- Base = (VOID*)(UINTN)PcdGet64 (PcdPlatformAhciBase);
- ASSERT (Base != NULL);
- Size = (UINTN)PcdGet32 (PcdPlatformAhciSize);
- ASSERT (Size != 0);
+ AhciBase = (VOID*)(UINTN)PcdGet64 (PcdPlatformAhciBase);
+ ASSERT (AhciBase != NULL);
+ AhciSize = (UINTN)PcdGet32 (PcdPlatformAhciSize);
+ ASSERT (AhciSize != 0);
DEBUG ((DEBUG_INFO, "%a: Got platform AHCI %llx %u\n",
- __FUNCTION__, Base, Size));
+ __FUNCTION__, AhciBase, AhciSize));
Status = RegisterNonDiscoverableMmioDevice (
NonDiscoverableDeviceTypeAhci,
@@ -43,13 +44,34 @@ InitializeSbsaQemuPlatformDxe (
NULL,
NULL,
1,
- Base, Size);
+ AhciBase, AhciSize);
if (EFI_ERROR(Status)) {
DEBUG ((DEBUG_ERROR, "%a: NonDiscoverable: Cannot install AHCI device @%p (Staus == %r)\n",
- __FUNCTION__, Base, Status));
+ __FUNCTION__, AhciBase, Status));
return Status;
}
+ XhciBase = (VOID*)(UINTN)PcdGet64 (PcdPlatformXhciBase);
+ ASSERT (XhciBase != NULL);
+ XhciSize = (UINTN)PcdGet32 (PcdPlatformXhciSize);
+ ASSERT (XhciSize != 0);
+
+ DEBUG ((DEBUG_INFO, "%a: Got platform XHCI %llx %u\n",
+ __FUNCTION__, XhciBase, XhciSize));
+
+ Status = RegisterNonDiscoverableMmioDevice (
+ NonDiscoverableDeviceTypeXhci,
+ NonDiscoverableDeviceDmaTypeCoherent,
+ NULL,
+ NULL,
+ 1,
+ XhciBase, XhciSize);
+
+ if (EFI_ERROR(Status)) {
+ DEBUG ((DEBUG_ERROR, "%a: NonDiscoverable: Cannot install XHCI device @%p (Staus == %r)\n",
+ __FUNCTION__, XhciBase, Status));
+ return Status;
+ }
return EFI_SUCCESS;
}
diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf
index 21d2135f..41cdcf16 100644
--- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf
+++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf
@@ -35,6 +35,8 @@
[Pcd]
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformAhciBase
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformAhciSize
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformXhciBase
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformXhciSize
[Depex]
TRUE
diff --git a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec b/Silicon/Qemu/SbsaQemu/SbsaQemu.dec
index 94488529..028c2974 100644
--- a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec
+++ b/Silicon/Qemu/SbsaQemu/SbsaQemu.dec
@@ -32,8 +32,8 @@
# Non discoverable devices Pcds
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformAhciBase|0|UINT64|0x00000001
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformAhciSize|0x10000|UINT32|0x00000002
- gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformEhciBase|0|UINT64|0x00000003
- gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformEhciSize|0x10000|UINT32|0x00000004
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformXhciBase|0|UINT64|0x00000003
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformXhciSize|0x10000|UINT32|0x00000004
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress|0x10000000000|UINT64|0x00000005
# PCDs complementing PCIe layout pulled into ACPI tables
--
2.34.1
^ permalink raw reply related [flat|nested] 5+ messages in thread* [PATCH v1 3/3] SbsaQemu: AcpiTables: Add XHCI info into DSDT
2023-06-05 12:47 [PATCH v1 0/3] use XHCI to replace EHCI wangyuquan1236
2023-06-05 12:47 ` [PATCH v1 1/3] Platform/Qemu/SbsaQemu/SbsaQemu.dsc: define XHCI Pcd settings wangyuquan1236
2023-06-05 12:47 ` [PATCH v1 2/3] SbsaQemu: Drivers: Add initial support for XHCI wangyuquan1236
@ 2023-06-05 12:47 ` wangyuquan1236
2023-06-05 12:53 ` [PATCH v1 0/3] use XHCI to replace EHCI Ard Biesheuvel
3 siblings, 0 replies; 5+ messages in thread
From: wangyuquan1236 @ 2023-06-05 12:47 UTC (permalink / raw)
To: ardb+tianocore, quic_llindhol
Cc: quic_ggregory, rad, devel, chenbaozi, marcin.juszkiewicz,
peter.maydell, Yuquan Wang
As sbsa-ref board uses xhci to replace ehci, the DSDT is updated to match
the platform xhci controller. This also removes previous ehci structure.
Signed-off-by: Yuquan Wang <wangyuquan1236@phytium.com.cn>
---
.../Qemu/SbsaQemu/AcpiTables/AcpiTables.inf | 4 +-
Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl | 125 ++----------------
2 files changed, 15 insertions(+), 114 deletions(-)
diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf b/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf
index 176d8fab..f9caca96 100644
--- a/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf
+++ b/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf
@@ -72,5 +72,5 @@
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformAhciBase
gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformAhciSize
- gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformEhciBase
- gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformEhciSize
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformXhciBase
+ gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformXhciSize
diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl b/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl
index 33579165..b4ef2c1f 100644
--- a/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl
+++ b/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl
@@ -68,120 +68,21 @@ DefinitionBlock ("DsdtTable.aml", "DSDT",
}
}
- // USB EHCI Host Controller
- Device (USB0) {
- Name (_HID, "LNRO0D20")
- Name (_CID, "PNP0D20")
+ // USB XHCI Host Controller
+ Device (XHCI) {
+ Name (_HID, "PNP0D10") // _HID: Hardware ID
+ Name (_UID, 0x00) // _UID: Unique ID
+ Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute
+ Name (_CRS, ResourceTemplate() {
+ Memory32Fixed (ReadWrite,
+ FixedPcdGet32 (PcdPlatformXhciBase),
+ FixedPcdGet32 (PcdPlatformXhciSize))
+ Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 43 }
+ })
Method (_STA) {
- Return (0xF)
- }
- Method (_CRS, 0x0, Serialized) {
- Name (RBUF, ResourceTemplate() {
- Memory32Fixed (ReadWrite,
- FixedPcdGet32 (PcdPlatformEhciBase),
- FixedPcdGet32 (PcdPlatformEhciSize))
- Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 43 }
- })
- Return (RBUF)
+ Return (0xF)
}
-
- // Root Hub
- Device (RHUB) {
- Name (_ADR, 0x00000000) // Address of Root Hub should be 0 as per ACPI 5.0 spec
- Method (_STA) {
- Return (0xF)
- }
-
- // Ports connected to Root Hub
- Device (HUB1) {
- Name (_ADR, 0x00000001)
- Name (_UPC, Package() {
- 0x00, // Port is NOT connectable
- 0xFF, // Don't care
- 0x00000000, // Reserved 0 must be zero
- 0x00000000 // Reserved 1 must be zero
- })
- Method (_STA) {
- Return (0xF)
- }
-
- Device (PRT1) {
- Name (_ADR, 0x00000001)
- Name (_UPC, Package() {
- 0xFF, // Port is connectable
- 0x00, // Port connector is A
- 0x00000000,
- 0x00000000
- })
- Name (_PLD, Package() {
- Buffer(0x10) {
- 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
- }
- })
- Method (_STA) {
- Return (0xF)
- }
- } // USB0_RHUB_HUB1_PRT1
- Device (PRT2) {
- Name (_ADR, 0x00000002)
- Name (_UPC, Package() {
- 0xFF, // Port is connectable
- 0x00, // Port connector is A
- 0x00000000,
- 0x00000000
- })
- Name (_PLD, Package() {
- Buffer(0x10) {
- 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
- }
- })
- Method (_STA) {
- Return (0xF)
- }
- } // USB0_RHUB_HUB1_PRT2
-
- Device (PRT3) {
- Name (_ADR, 0x00000003)
- Name (_UPC, Package() {
- 0xFF, // Port is connectable
- 0x00, // Port connector is A
- 0x00000000,
- 0x00000000
- })
- Name (_PLD, Package() {
- Buffer (0x10) {
- 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
- }
- })
- Method (_STA) {
- Return (0xF)
- }
- } // USB0_RHUB_HUB1_PRT3
-
- Device (PRT4) {
- Name (_ADR, 0x00000004)
- Name (_UPC, Package() {
- 0xFF, // Port is connectable
- 0x00, // Port connector is A
- 0x00000000,
- 0x00000000
- })
- Name (_PLD, Package() {
- Buffer (0x10){
- 0x81, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
- 0x31, 0x1C, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00
- }
- })
- Method (_STA) {
- Return (0xF)
- }
- } // USB0_RHUB_HUB1_PRT4
- } // USB0_RHUB_HUB1
- } // USB0_RHUB
- } // USB0
+ }
Device (PCI0)
{
--
2.34.1
^ permalink raw reply related [flat|nested] 5+ messages in thread