[PATCH 1/1] MdePkg/BaseSynchronizationLib: Fix RISC-V synchronization functions

[PATCH 1/1] MdePkg/BaseSynchronizationLib: Fix RISC-V synchronization functions

[Sunil V L]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4433

There is a return value bug. SyncIncrement and SyncDecrement functions
should return the updated value. But destination register rd in
amoadd instruction will not have final incremented value. Fix this
by loading the incremented value from the memory where amoadd
instruction would have stored the final incremented value.

Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Reported-by: Chao Li <lichao@loongson.cn>
Cc: Daniel Schaefer <git@danielschaefer.me>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Andrei Warkentin <andrei.warkentin@intel.com>
---
 .../Library/BaseSynchronizationLib/RiscV64/Synchronization.S  | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/MdePkg/Library/BaseSynchronizationLib/RiscV64/Synchronization.S b/MdePkg/Library/BaseSynchronizationLib/RiscV64/Synchronization.S
index f287ef38f651..34672507d8dc 100644
--- a/MdePkg/Library/BaseSynchronizationLib/RiscV64/Synchronization.S
+++ b/MdePkg/Library/BaseSynchronizationLib/RiscV64/Synchronization.S
@@ -61,7 +61,7 @@ exit2:
 ASM_PFX (InternalSyncIncrement):
     li  a1, 1
     amoadd.w  a2, a1, (a0)
-    mv  a0, a2
+    ld  a0, 0(a0)
     ret
 
 //
@@ -72,5 +72,5 @@ ASM_PFX (InternalSyncIncrement):
 ASM_PFX (InternalSyncDecrement):
     li  a1, -1
     amoadd.w  a2, a1, (a0)
-    mv  a0, a2
+    ld  a0, 0(a0)
     ret
-- 
2.34.1