From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by mx.groups.io with SMTP id smtpd.web11.386.1686191344244208222 for ; Wed, 07 Jun 2023 19:29:06 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=iayGOHjU; spf=pass (domain: intel.com, ip: 192.55.52.115, mailfrom: dun.tan@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1686191346; x=1717727346; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=NJUHgytCNPROD5f7M6TNVf5cwtAnURUfqJ6+jQya42I=; b=iayGOHjUEbWZbDbVG3Bd6F5p48eURzl+1GXeoj50m9MuOzCDuoxoZMeH krCwATH0Z5xetM0IrAes26LRE1860STWcuAsVItU8x/ASZ3J+5tAHLBFm xVn56EhysIQ5y+zUgCCLvay9nNSOeuxSBWNPxLkIXgS2sHZiU5SC+uZDD NqJ6rBQR3wv9Ob7vxbJEgqYltZ61ewqkTGZ2mhAPfbI6dyZYAlDPLXYT2 4k1Rd+zTkupzfSNFXc3EagC9lQPN1VF7iWYGrSjGIIi9JcPtiufkb+cZb +B92OvvkSxwPxlou+O4IuRUDAPc3zB/qx8Lk/Tmd+3GnvdqeUd2jYFMSX Q==; X-IronPort-AV: E=McAfee;i="6600,9927,10734"; a="357184392" X-IronPort-AV: E=Sophos;i="6.00,225,1681196400"; d="scan'208";a="357184392" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jun 2023 19:29:06 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10734"; a="774877886" X-IronPort-AV: E=Sophos;i="6.00,225,1681196400"; d="scan'208";a="774877886" Received: from shwdeopenlab702.ccr.corp.intel.com ([10.239.55.158]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jun 2023 19:29:04 -0700 From: "duntan" To: devel@edk2.groups.io Cc: Eric Dong , Ray Ni , Rahul Kumar , Gerd Hoffmann Subject: [Patch V5 10/14] UefiCpuPkg: Use GenSmmPageTable() to create Smm S3 page table Date: Thu, 8 Jun 2023 10:27:38 +0800 Message-Id: <20230608022742.1292-11-dun.tan@intel.com> X-Mailer: git-send-email 2.31.1.windows.1 In-Reply-To: <20230608022742.1292-1-dun.tan@intel.com> References: <20230608022742.1292-1-dun.tan@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Use GenSmmPageTable() to create both IA32 and X64 Smm S3 page table. Signed-off-by: Dun Tan Cc: Eric Dong Reviewed-by: Ray Ni Cc: Rahul Kumar Cc: Gerd Hoffmann --- UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmProfileArch.c | 2 +- UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c | 130 ---------------------------------------------------------------------------------------------------------------------------------- UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmProfileArch.c | 20 ++++---------------- 3 files changed, 5 insertions(+), 147 deletions(-) diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmProfileArch.c b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmProfileArch.c index bba4a6f058..650090e534 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmProfileArch.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmmProfileArch.c @@ -18,7 +18,7 @@ InitSmmS3Cr3 ( VOID ) { - mSmmS3ResumeState->SmmS3Cr3 = Gen4GPageTable (TRUE); + mSmmS3ResumeState->SmmS3Cr3 = GenSmmPageTable (PagingPae, mPhysicalAddressBits); return; } diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c index 1878252eac..f8b81fc96e 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c @@ -999,136 +999,6 @@ APHandler ( ReleaseSemaphore (mSmmMpSyncData->CpuData[BspIndex].Run); } -/** - Create 4G PageTable in SMRAM. - - @param[in] Is32BitPageTable Whether the page table is 32-bit PAE - @return PageTable Address - -**/ -UINT32 -Gen4GPageTable ( - IN BOOLEAN Is32BitPageTable - ) -{ - VOID *PageTable; - UINTN Index; - UINT64 *Pte; - UINTN PagesNeeded; - UINTN Low2MBoundary; - UINTN High2MBoundary; - UINTN Pages; - UINTN GuardPage; - UINT64 *Pdpte; - UINTN PageIndex; - UINTN PageAddress; - - Low2MBoundary = 0; - High2MBoundary = 0; - PagesNeeded = 0; - if (FeaturePcdGet (PcdCpuSmmStackGuard)) { - // - // Add one more page for known good stack, then find the lower 2MB aligned address. - // - Low2MBoundary = (mSmmStackArrayBase + EFI_PAGE_SIZE) & ~(SIZE_2MB-1); - // - // Add two more pages for known good stack and stack guard page, - // then find the lower 2MB aligned address. - // - High2MBoundary = (mSmmStackArrayEnd - mSmmStackSize - mSmmShadowStackSize + EFI_PAGE_SIZE * 2) & ~(SIZE_2MB-1); - PagesNeeded = ((High2MBoundary - Low2MBoundary) / SIZE_2MB) + 1; - } - - // - // Allocate the page table - // - PageTable = AllocatePageTableMemory (5 + PagesNeeded); - ASSERT (PageTable != NULL); - - PageTable = (VOID *)((UINTN)PageTable); - Pte = (UINT64 *)PageTable; - - // - // Zero out all page table entries first - // - ZeroMem (Pte, EFI_PAGES_TO_SIZE (1)); - - // - // Set Page Directory Pointers - // - for (Index = 0; Index < 4; Index++) { - Pte[Index] = ((UINTN)PageTable + EFI_PAGE_SIZE * (Index + 1)) | mAddressEncMask | - (Is32BitPageTable ? IA32_PAE_PDPTE_ATTRIBUTE_BITS : PAGE_ATTRIBUTE_BITS); - } - - Pte += EFI_PAGE_SIZE / sizeof (*Pte); - - // - // Fill in Page Directory Entries - // - for (Index = 0; Index < EFI_PAGE_SIZE * 4 / sizeof (*Pte); Index++) { - Pte[Index] = (Index << 21) | mAddressEncMask | IA32_PG_PS | PAGE_ATTRIBUTE_BITS; - } - - Pdpte = (UINT64 *)PageTable; - if (FeaturePcdGet (PcdCpuSmmStackGuard)) { - Pages = (UINTN)PageTable + EFI_PAGES_TO_SIZE (5); - GuardPage = mSmmStackArrayBase + EFI_PAGE_SIZE; - for (PageIndex = Low2MBoundary; PageIndex <= High2MBoundary; PageIndex += SIZE_2MB) { - Pte = (UINT64 *)(UINTN)(Pdpte[BitFieldRead32 ((UINT32)PageIndex, 30, 31)] & ~mAddressEncMask & ~(EFI_PAGE_SIZE - 1)); - Pte[BitFieldRead32 ((UINT32)PageIndex, 21, 29)] = (UINT64)Pages | mAddressEncMask | PAGE_ATTRIBUTE_BITS; - // - // Fill in Page Table Entries - // - Pte = (UINT64 *)Pages; - PageAddress = PageIndex; - for (Index = 0; Index < EFI_PAGE_SIZE / sizeof (*Pte); Index++) { - if (PageAddress == GuardPage) { - // - // Mark the guard page as non-present - // - Pte[Index] = PageAddress | mAddressEncMask; - GuardPage += (mSmmStackSize + mSmmShadowStackSize); - if (GuardPage > mSmmStackArrayEnd) { - GuardPage = 0; - } - } else { - Pte[Index] = PageAddress | mAddressEncMask | PAGE_ATTRIBUTE_BITS; - } - - PageAddress += EFI_PAGE_SIZE; - } - - Pages += EFI_PAGE_SIZE; - } - } - - if ((PcdGet8 (PcdNullPointerDetectionPropertyMask) & BIT1) != 0) { - Pte = (UINT64 *)(UINTN)(Pdpte[0] & ~mAddressEncMask & ~(EFI_PAGE_SIZE - 1)); - if ((Pte[0] & IA32_PG_PS) == 0) { - // 4K-page entries are already mapped. Just hide the first one anyway. - Pte = (UINT64 *)(UINTN)(Pte[0] & ~mAddressEncMask & ~(EFI_PAGE_SIZE - 1)); - Pte[0] &= ~(UINT64)IA32_PG_P; // Hide page 0 - } else { - // Create 4K-page entries - Pages = (UINTN)AllocatePageTableMemory (1); - ASSERT (Pages != 0); - - Pte[0] = (UINT64)(Pages | mAddressEncMask | PAGE_ATTRIBUTE_BITS); - - Pte = (UINT64 *)Pages; - PageAddress = 0; - Pte[0] = PageAddress | mAddressEncMask; // Hide page 0 but present left - for (Index = 1; Index < EFI_PAGE_SIZE / sizeof (*Pte); Index++) { - PageAddress += EFI_PAGE_SIZE; - Pte[Index] = PageAddress | mAddressEncMask | PAGE_ATTRIBUTE_BITS; - } - } - } - - return (UINT32)(UINTN)PageTable; -} - /** Checks whether the input token is the current used token. diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmProfileArch.c b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmProfileArch.c index cb7a691745..01432d466c 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmProfileArch.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmmProfileArch.c @@ -35,26 +35,14 @@ InitSmmS3Cr3 ( VOID ) { - EFI_PHYSICAL_ADDRESS Pages; - UINT64 *PTEntry; - - // - // Generate PAE page table for the first 4GB memory space - // - Pages = Gen4GPageTable (FALSE); - // - // Fill Page-Table-Level4 (PML4) entry + // Generate level4 page table for the first 4GB memory space + // Return the address of PML4 (to set CR3) // - PTEntry = (UINT64 *)AllocatePageTableMemory (1); - ASSERT (PTEntry != NULL); - *PTEntry = Pages | mAddressEncMask | PAGE_ATTRIBUTE_BITS; - ZeroMem (PTEntry + 1, EFI_PAGE_SIZE - sizeof (*PTEntry)); - // - // Return the address of PML4 (to set CR3) + // The SmmS3Cr3 is only used by S3Resume PEIM to switch CPU from 32bit to 64bit // - mSmmS3ResumeState->SmmS3Cr3 = (UINT32)(UINTN)PTEntry; + mSmmS3ResumeState->SmmS3Cr3 = (UINT32)GenSmmPageTable (Paging4Level, 32); return; } -- 2.31.1.windows.1