From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by mx.groups.io with SMTP id smtpd.web11.377.1686191300320666390 for ; Wed, 07 Jun 2023 19:28:24 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=d5XFfi7w; spf=pass (domain: intel.com, ip: 192.55.52.115, mailfrom: dun.tan@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1686191303; x=1717727303; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=kRXNcjVY0GXv3UbAMovUOmyqYrmNAcejMNFLszlzbXg=; b=d5XFfi7wU3K2vaoIVt+LB0zkUBeKMpdtFHijPBwuEk7jO4xuFZJl0BYO kxi9R+nvxqORwPJcZLbbTOi4sUbY2XVnqVwAq+Kbdqq1JnibyuCI+SKN/ UefkTz4t8GgHyKmLL525dG3PvUrLVqKOWLWK+RHRB+2ZNdct13h3D0wX8 5k8aOYA1UfVRCebNdGHYjknHmGneucHtYs0lnvzKVBRuQK7oZ8WLCUYY/ 0if2cCtwKOyya+frDpgFLnhy0NMEKa30vxY2VdHAdG3VeP2+Eyu0BPlEo H6scXZeuX1t3lnqXmJoLdErcE2I830IOs2LPk/ARtQdkcfEM/MKW8bwTP g==; X-IronPort-AV: E=McAfee;i="6600,9927,10734"; a="357184164" X-IronPort-AV: E=Sophos;i="6.00,225,1681196400"; d="scan'208";a="357184164" Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jun 2023 19:28:23 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10734"; a="774877674" X-IronPort-AV: E=Sophos;i="6.00,225,1681196400"; d="scan'208";a="774877674" Received: from shwdeopenlab702.ccr.corp.intel.com ([10.239.55.158]) by fmsmga008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Jun 2023 19:28:21 -0700 From: "duntan" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Jiewen Yao , Jordan Justen , Gerd Hoffmann , Tom Lendacky , Ray Ni Subject: [Patch V5 01/14] OvmfPkg:Remove code that apply AddressEncMask to non-leaf entry Date: Thu, 8 Jun 2023 10:27:29 +0800 Message-Id: <20230608022742.1292-2-dun.tan@intel.com> X-Mailer: git-send-email 2.31.1.windows.1 In-Reply-To: <20230608022742.1292-1-dun.tan@intel.com> References: <20230608022742.1292-1-dun.tan@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Remove code that apply AddressEncMask to non-leaf entry when split smm page table by MemEncryptSevLib. In FvbServicesSmm driver, it calls MemEncryptSevClearMmioPageEncMask to clear AddressEncMask bit in page table for a specific range. In AMD SEV feature, this AddressEncMask bit in page table is used to indicate if the memory is guest private memory or shared memory. But all memory used by page table are treated as encrypted regardless of encryption bit. So remove the EncMask bit for smm non-leaf page table entry doesn't impact AMD SEV feature. If page split happens in the AddressEncMask bit clear process, there will be some new non-leaf entries with AddressEncMask applied in smm page table. When ReadyToLock, code in PiSmmCpuDxe module will use CpuPageTableLib to modify smm page table. So remove code to apply AddressEncMask for new non-leaf entries since CpuPageTableLib doesn't consume the EncMask PCD. Signed-off-by: Dun Tan Cc: Ard Biesheuvel Cc: Jiewen Yao Cc: Jordan Justen Cc: Gerd Hoffmann Cc: Tom Lendacky Cc: Ray Ni --- OvmfPkg/Library/BaseMemEncryptSevLib/X64/PeiDxeVirtualMemory.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/OvmfPkg/Library/BaseMemEncryptSevLib/X64/PeiDxeVirtualMemory.c b/OvmfPkg/Library/BaseMemEncryptSevLib/X64/PeiDxeVirtualMemory.c index cf2441b551..aba2e8c081 100644 --- a/OvmfPkg/Library/BaseMemEncryptSevLib/X64/PeiDxeVirtualMemory.c +++ b/OvmfPkg/Library/BaseMemEncryptSevLib/X64/PeiDxeVirtualMemory.c @@ -233,7 +233,7 @@ Split2MPageTo4K ( // Fill in 2M page entry. // *PageEntry2M = ((UINT64)(UINTN)PageTableEntry1 | - IA32_PG_P | IA32_PG_RW | AddressEncMask); + IA32_PG_P | IA32_PG_RW); } /** @@ -352,7 +352,7 @@ SetPageTablePoolReadOnly ( PhysicalAddress += LevelSize[Level - 1]; } - PageTable[Index] = (UINT64)(UINTN)NewPageTable | AddressEncMask | + PageTable[Index] = (UINT64)(UINTN)NewPageTable | IA32_PG_P | IA32_PG_RW; PageTable = NewPageTable; } @@ -440,7 +440,7 @@ Split1GPageTo2M ( // Fill in 1G page entry. // *PageEntry1G = ((UINT64)(UINTN)PageDirectoryEntry | - IA32_PG_P | IA32_PG_RW | AddressEncMask); + IA32_PG_P | IA32_PG_RW); PhysicalAddress2M = PhysicalAddress; for (IndexOfPageDirectoryEntries = 0; -- 2.31.1.windows.1