[PATCH 1/4] MdePkg: Add new API GetMaxPlatformAddressBits

[PATCH 1/4] MdePkg: Add new API GetMaxPlatformAddressBits

[Zhiguang Liu]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3394

Add new API GetMaxPlatformAddressBits to get the max platform address
bits. Max physical address bits can be get from CPUID. When TME-MK
feature is enabled, the upper bits of the max physical address bits
are repurposed for usage as a KeyID.
Therefore, the max platform addressable bits is the max physical
address bits minus the upper bits used for KeyID if TME-MK is enable.

Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
---
 MdePkg/Include/Library/CpuLib.h           | 25 +++++++
 MdePkg/Library/BaseCpuLib/X86BaseCpuLib.c | 81 +++++++++++++++++++++++
 2 files changed, 106 insertions(+)

diff --git a/MdePkg/Include/Library/CpuLib.h b/MdePkg/Include/Library/CpuLib.h
index 3f29937dc7..a9bac083b7 100644
--- a/MdePkg/Include/Library/CpuLib.h
+++ b/MdePkg/Include/Library/CpuLib.h
@@ -87,6 +87,31 @@ GetCpuSteppingId (
   VOID
   );
 
+/**
+  Get the max platform addressable bits.
+  Max physical address bits can be get from CPUID. When TME-MK feature
+  is enabled, the upper bits of the max physical address bits are
+  repurposed for usage as a KeyID.
+  Therefore, the max platform addressable bits is the max physical
+  address bits minus the upper bits used for KeyID if TME-MK is enable.
+
+  @param[out] ValidAddressMask          Bitmask with valid address bits set to
+                                        one; other bits are clear. Optional
+                                        parameter.
+
+  @param[out] ValidPageBaseAddressMask  Bitmask with valid page base address
+                                        bits set to one; other bits are clear.
+                                        Optional parameter.
+
+  @return  The max platform addressable bits.
+**/
+UINT8
+EFIAPI
+GetMaxPlatformAddressBits (
+  OUT UINT64  *ValidAddressMask         OPTIONAL,
+  OUT UINT64  *ValidPageBaseAddressMask OPTIONAL
+  );
+
 #endif
 
 #endif
diff --git a/MdePkg/Library/BaseCpuLib/X86BaseCpuLib.c b/MdePkg/Library/BaseCpuLib/X86BaseCpuLib.c
index 1cad32a4be..7b15cb3d73 100644
--- a/MdePkg/Library/BaseCpuLib/X86BaseCpuLib.c
+++ b/MdePkg/Library/BaseCpuLib/X86BaseCpuLib.c
@@ -14,6 +14,8 @@
 
 #include <Library/BaseLib.h>
 #include <Library/CpuLib.h>
+#include <Register/Intel/ArchitecturalMsr.h>
+#include <Uefi/UefiBaseType.h>
 
 /**
   Determine if the standard CPU signature is "AuthenticAMD".
@@ -79,3 +81,82 @@ GetCpuSteppingId (
 
   return (UINT8)Eax.Bits.SteppingId;
 }
+
+/**
+  Get the max platform addressable bits.
+  Max physical address bits can be get from CPUID. When TME-MK feature
+  is enabled, the upper bits of the max physical address bits are
+  repurposed for usage as a KeyID.
+  Therefore, the max platform addressable bits is the max physical
+  address bits minus the upper bits used for KeyID if TME-MK is enable.
+
+  @param[out] ValidAddressMask          Bitmask with valid address bits set to
+                                        one; other bits are clear. Optional
+                                        parameter.
+
+  @param[out] ValidPageBaseAddressMask  Bitmask with valid page base address
+                                        bits set to one; other bits are clear.
+                                        Optional parameter.
+
+  @return  The max platform addressable bits.
+**/
+UINT8
+EFIAPI
+GetMaxPlatformAddressBits (
+  OUT UINT64  *ValidAddressMask         OPTIONAL,
+  OUT UINT64  *ValidPageBaseAddressMask OPTIONAL
+  )
+{
+  UINT32                                       MaxExtendedFunction;
+  CPUID_VIR_PHY_ADDRESS_SIZE_EAX               VirPhyAddressSize;
+  UINT64                                       AddressMask;
+  UINT64                                       PageBaseAddressMask;
+  UINT32                                       MaxFunction;
+  CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_ECX  ExtendedFeatureFlagsEcx;
+  MSR_IA32_TME_ACTIVATE_REGISTER               TmeActivate;
+  MSR_IA32_TME_CAPABILITY_REGISTER             TmeCapability;
+
+  AsmCpuid (CPUID_EXTENDED_FUNCTION, &MaxExtendedFunction, NULL, NULL, NULL);
+  if (MaxExtendedFunction >= CPUID_VIR_PHY_ADDRESS_SIZE) {
+    AsmCpuid (
+      CPUID_VIR_PHY_ADDRESS_SIZE,
+      &VirPhyAddressSize.Uint32,
+      NULL,
+      NULL,
+      NULL
+      );
+  } else {
+    VirPhyAddressSize.Bits.PhysicalAddressBits = 36;
+  }
+
+  //
+  // CPUID enumeration of MAX_PA is unaffected by TME-MK activation and will continue
+  // to report the maximum physical address bits available for software to use,
+  // irrespective of the number of KeyID bits.
+  // So, we need to check if TME is enabled and adjust the PA size accordingly.
+  //
+  AsmCpuid (CPUID_SIGNATURE, &MaxFunction, NULL, NULL, NULL);
+  if (MaxFunction >= CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS) {
+    AsmCpuidEx (CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS, 0, NULL, NULL, &ExtendedFeatureFlagsEcx.Uint32, NULL);
+    if (ExtendedFeatureFlagsEcx.Bits.TME_EN == 1) {
+      TmeActivate.Uint64   = AsmReadMsr64 (MSR_IA32_TME_ACTIVATE);
+      TmeCapability.Uint64 = AsmReadMsr64 (MSR_IA32_TME_CAPABILITY);
+      if ((TmeActivate.Bits.TmeEnable == 1) && (TmeCapability.Bits.MkTmeMaxKeyidBits != 0)) {
+        VirPhyAddressSize.Bits.PhysicalAddressBits -= TmeActivate.Bits.MkTmeKeyidBits;
+      }
+    }
+  }
+
+  AddressMask         = LShiftU64 (1, VirPhyAddressSize.Bits.PhysicalAddressBits) - 1;
+  PageBaseAddressMask = AddressMask & ~(UINT64)EFI_PAGE_MASK;
+
+  if (ValidAddressMask != NULL) {
+    *ValidAddressMask = AddressMask;
+  }
+
+  if (ValidPageBaseAddressMask != NULL) {
+    *ValidPageBaseAddressMask = PageBaseAddressMask;
+  }
+
+  return (UINT8)VirPhyAddressSize.Bits.PhysicalAddressBits;
+}
-- 
2.31.1.windows.1

[PATCH 2/4] PrmPkg: Use new API to replace MtrrLibInitializeMtrrMask

[Zhiguang Liu]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3394

The function MtrrLibInitializeMtrrMask is a private function
in MtrrLib.c from UefiCpuPkg, and it can be replace with new
API GetMaxPlatformAddressBits.

Cc: Michael Kubacki <mikuback@linux.microsoft.com>
Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
---
 .../PrmSampleHardwareAccessModule.c            | 18 ++----------------
 .../PrmSampleHardwareAccessModule.inf          |  1 +
 2 files changed, 3 insertions(+), 16 deletions(-)

diff --git a/PrmPkg/Samples/PrmSampleHardwareAccessModule/PrmSampleHardwareAccessModule.c b/PrmPkg/Samples/PrmSampleHardwareAccessModule/PrmSampleHardwareAccessModule.c
index 1a1e735029..398497c3a9 100644
--- a/PrmPkg/Samples/PrmSampleHardwareAccessModule/PrmSampleHardwareAccessModule.c
+++ b/PrmPkg/Samples/PrmSampleHardwareAccessModule/PrmSampleHardwareAccessModule.c
@@ -13,6 +13,7 @@
 #include <Library/BaseLib.h>
 #include <Library/MtrrLib.h>
 #include <Library/UefiLib.h>
+#include <Library/CpuLib.h>
 
 #include <Register/Intel/ArchitecturalMsr.h>
 #include <Register/Intel/Cpuid.h>
@@ -37,21 +38,6 @@
 //
 extern CONST CHAR8  *mMtrrMemoryCacheTypeShortName[];
 
-/**
-  Initializes the valid bits mask and valid address mask for MTRRs.
-
-  This function initializes the valid bits mask and valid address mask for MTRRs.
-
-  @param[out]  MtrrValidBitsMask     The mask for the valid bit of the MTRR
-  @param[out]  MtrrValidAddressMask  The valid address mask for the MTRR
-
-**/
-VOID
-MtrrLibInitializeMtrrMask (
-  OUT UINT64  *MtrrValidBitsMask,
-  OUT UINT64  *MtrrValidAddressMask
-  );
-
 /**
   Convert variable MTRRs to a RAW MTRR_MEMORY_RANGE array.
   One MTRR_MEMORY_RANGE element is created for each MTRR setting.
@@ -151,7 +137,7 @@ AccessAllMtrrs (
   MtrrGetAllMtrrs (&LocalMtrrs);
   Mtrrs = &LocalMtrrs;
 
-  MtrrLibInitializeMtrrMask (&MtrrValidBitsMask, &MtrrValidAddressMask);
+  GetMaxPlatformAddressBits (&MtrrValidBitsMask, &MtrrValidAddressMask);
   Ranges[0].BaseAddress = 0;
   Ranges[0].Length      = MtrrValidBitsMask + 1;
   Ranges[0].Type        = MtrrGetDefaultMemoryType ();
diff --git a/PrmPkg/Samples/PrmSampleHardwareAccessModule/PrmSampleHardwareAccessModule.inf b/PrmPkg/Samples/PrmSampleHardwareAccessModule/PrmSampleHardwareAccessModule.inf
index 46d4a88185..b15da817c1 100644
--- a/PrmPkg/Samples/PrmSampleHardwareAccessModule/PrmSampleHardwareAccessModule.inf
+++ b/PrmPkg/Samples/PrmSampleHardwareAccessModule/PrmSampleHardwareAccessModule.inf
@@ -34,6 +34,7 @@
   MtrrLib
   UefiDriverEntryPoint
   UefiLib
+  CpuLib
 
 [Depex]
   TRUE
-- 
2.31.1.windows.1

[PATCH 3/4] UefiCpuPkg: Clean up some Mtrr code using new API

[Zhiguang Liu]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3394

With new API GetMaxPlatformAddressBits, the API
MtrrLibInitializeMtrrMask and InitializeMtrrMask can be replaced.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
---
 UefiCpuPkg/CpuDxe/CpuDxe.c           | 49 +-----------------------
 UefiCpuPkg/Library/MtrrLib/MtrrLib.c | 56 ++--------------------------
 2 files changed, 4 insertions(+), 101 deletions(-)

diff --git a/UefiCpuPkg/CpuDxe/CpuDxe.c b/UefiCpuPkg/CpuDxe/CpuDxe.c
index 804ef5d1fe..7505801c01 100644
--- a/UefiCpuPkg/CpuDxe/CpuDxe.c
+++ b/UefiCpuPkg/CpuDxe/CpuDxe.c
@@ -494,52 +494,6 @@ CpuSetMemoryAttributes (
   return AssignMemoryPageAttributes (NULL, BaseAddress, Length, MemoryAttributes, NULL);
 }
 
-/**
-  Initializes the valid bits mask and valid address mask for MTRRs.
-
-  This function initializes the valid bits mask and valid address mask for MTRRs.
-
-**/
-VOID
-InitializeMtrrMask (
-  VOID
-  )
-{
-  UINT32                                       MaxExtendedFunction;
-  CPUID_VIR_PHY_ADDRESS_SIZE_EAX               VirPhyAddressSize;
-  UINT32                                       MaxFunction;
-  CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_ECX  ExtendedFeatureFlagsEcx;
-  MSR_IA32_TME_ACTIVATE_REGISTER               TmeActivate;
-
-  AsmCpuid (CPUID_EXTENDED_FUNCTION, &MaxExtendedFunction, NULL, NULL, NULL);
-
-  if (MaxExtendedFunction >= CPUID_VIR_PHY_ADDRESS_SIZE) {
-    AsmCpuid (CPUID_VIR_PHY_ADDRESS_SIZE, &VirPhyAddressSize.Uint32, NULL, NULL, NULL);
-  } else {
-    VirPhyAddressSize.Bits.PhysicalAddressBits = 36;
-  }
-
-  //
-  // CPUID enumeration of MAX_PA is unaffected by TME-MK activation and will continue
-  // to report the maximum physical address bits available for software to use,
-  // irrespective of the number of KeyID bits.
-  // So, we need to check if TME is enabled and adjust the PA size accordingly.
-  //
-  AsmCpuid (CPUID_SIGNATURE, &MaxFunction, NULL, NULL, NULL);
-  if (MaxFunction >= CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS) {
-    AsmCpuidEx (CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS, 0, NULL, NULL, &ExtendedFeatureFlagsEcx.Uint32, NULL);
-    if (ExtendedFeatureFlagsEcx.Bits.TME_EN == 1) {
-      TmeActivate.Uint64 = AsmReadMsr64 (MSR_IA32_TME_ACTIVATE);
-      if (TmeActivate.Bits.TmeEnable == 1) {
-        VirPhyAddressSize.Bits.PhysicalAddressBits -= TmeActivate.Bits.MkTmeKeyidBits;
-      }
-    }
-  }
-
-  mValidMtrrBitsMask    = LShiftU64 (1, VirPhyAddressSize.Bits.PhysicalAddressBits) - 1;
-  mValidMtrrAddressMask = mValidMtrrBitsMask & 0xfffffffffffff000ULL;
-}
-
 /**
   Gets GCD Mem Space type from MTRR Type.
 
@@ -740,8 +694,7 @@ RefreshMemoryAttributesFromMtrr (
   //
   // Initialize the valid bits mask and valid address mask for MTRRs
   //
-  InitializeMtrrMask ();
-
+  GetMaxPlatformAddressBits (&mValidMtrrBitsMask, &mValidMtrrAddressMask);
   //
   // Get the memory attribute of variable MTRRs
   //
diff --git a/UefiCpuPkg/Library/MtrrLib/MtrrLib.c b/UefiCpuPkg/Library/MtrrLib/MtrrLib.c
index 22ec8d2a48..95bf8d771f 100644
--- a/UefiCpuPkg/Library/MtrrLib/MtrrLib.c
+++ b/UefiCpuPkg/Library/MtrrLib/MtrrLib.c
@@ -741,56 +741,6 @@ MtrrLibTypeLeftPrecedeRight (
   return (BOOLEAN)(Left == CacheUncacheable || (Left == CacheWriteThrough && Right == CacheWriteBack));
 }
 
-/**
-  Initializes the valid bits mask and valid address mask for MTRRs.
-
-  This function initializes the valid bits mask and valid address mask for MTRRs.
-
-  @param[out]  MtrrValidBitsMask     The mask for the valid bit of the MTRR
-  @param[out]  MtrrValidAddressMask  The valid address mask for the MTRR
-
-**/
-VOID
-MtrrLibInitializeMtrrMask (
-  OUT UINT64  *MtrrValidBitsMask,
-  OUT UINT64  *MtrrValidAddressMask
-  )
-{
-  UINT32                                       MaxExtendedFunction;
-  CPUID_VIR_PHY_ADDRESS_SIZE_EAX               VirPhyAddressSize;
-  UINT32                                       MaxFunction;
-  CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_ECX  ExtendedFeatureFlagsEcx;
-  MSR_IA32_TME_ACTIVATE_REGISTER               TmeActivate;
-
-  AsmCpuid (CPUID_EXTENDED_FUNCTION, &MaxExtendedFunction, NULL, NULL, NULL);
-
-  if (MaxExtendedFunction >= CPUID_VIR_PHY_ADDRESS_SIZE) {
-    AsmCpuid (CPUID_VIR_PHY_ADDRESS_SIZE, &VirPhyAddressSize.Uint32, NULL, NULL, NULL);
-  } else {
-    VirPhyAddressSize.Bits.PhysicalAddressBits = 36;
-  }
-
-  //
-  // CPUID enumeration of MAX_PA is unaffected by TME-MK activation and will continue
-  // to report the maximum physical address bits available for software to use,
-  // irrespective of the number of KeyID bits.
-  // So, we need to check if TME is enabled and adjust the PA size accordingly.
-  //
-  AsmCpuid (CPUID_SIGNATURE, &MaxFunction, NULL, NULL, NULL);
-  if (MaxFunction >= CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS) {
-    AsmCpuidEx (CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS, 0, NULL, NULL, &ExtendedFeatureFlagsEcx.Uint32, NULL);
-    if (ExtendedFeatureFlagsEcx.Bits.TME_EN == 1) {
-      TmeActivate.Uint64 = AsmReadMsr64 (MSR_IA32_TME_ACTIVATE);
-      if (TmeActivate.Bits.TmeEnable == 1) {
-        VirPhyAddressSize.Bits.PhysicalAddressBits -= TmeActivate.Bits.MkTmeKeyidBits;
-      }
-    }
-  }
-
-  *MtrrValidBitsMask    = LShiftU64 (1, VirPhyAddressSize.Bits.PhysicalAddressBits) - 1;
-  *MtrrValidAddressMask = *MtrrValidBitsMask & 0xfffffffffffff000ULL;
-}
-
 /**
   Determines the real attribute of a memory range.
 
@@ -900,7 +850,7 @@ MtrrGetMemoryAttributeByAddressWorker (
   ASSERT (VariableMtrrCount <= ARRAY_SIZE (MtrrSetting->Variables.Mtrr));
   MtrrGetVariableMtrrWorker (MtrrSetting, VariableMtrrCount, &VariableSettings);
 
-  MtrrLibInitializeMtrrMask (&MtrrValidBitsMask, &MtrrValidAddressMask);
+  GetMaxPlatformAddressBits (&MtrrValidBitsMask, &MtrrValidAddressMask);
   MtrrLibGetRawVariableRanges (
     &VariableSettings,
     VariableMtrrCount,
@@ -2298,7 +2248,7 @@ MtrrSetMemoryAttributesInMtrrSettings (
   BOOLEAN       MtrrContextValid;
 
   Status = RETURN_SUCCESS;
-  MtrrLibInitializeMtrrMask (&MtrrValidBitsMask, &MtrrValidAddressMask);
+  GetMaxPlatformAddressBits (&MtrrValidBitsMask, &MtrrValidAddressMask);
 
   //
   // TRUE indicating the accordingly Variable setting needs modificaiton in OriginalVariableMtrr.
@@ -2952,7 +2902,7 @@ MtrrDebugPrintAllMtrrsWorker (
   //
   DEBUG ((DEBUG_CACHE, "Memory Ranges:\n"));
   DEBUG ((DEBUG_CACHE, "====================================\n"));
-  MtrrLibInitializeMtrrMask (&MtrrValidBitsMask, &MtrrValidAddressMask);
+  GetMaxPlatformAddressBits (&MtrrValidBitsMask, &MtrrValidAddressMask);
   Ranges[0].BaseAddress = 0;
   Ranges[0].Length      = MtrrValidBitsMask + 1;
   Ranges[0].Type        = MtrrGetDefaultMemoryTypeWorker (Mtrrs);
-- 
2.31.1.windows.1

[PATCH 4/4] UefiCpuPkg: Init new MSR value for MtrrLib Unit Test

[Zhiguang Liu]

REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3394

Using new API GetMaxPlatformAddressBits, MtrrLib Unit Test needs to
provide the value of MSR MSR_IA32_TME_CAPABILITY.

Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
---
 UefiCpuPkg/Library/MtrrLib/UnitTest/Support.c | 7 +++++++
 UefiCpuPkg/Test/UefiCpuPkgHostTest.dsc        | 5 ++++-
 2 files changed, 11 insertions(+), 1 deletion(-)

diff --git a/UefiCpuPkg/Library/MtrrLib/UnitTest/Support.c b/UefiCpuPkg/Library/MtrrLib/UnitTest/Support.c
index ba1de10034..25df09f882 100644
--- a/UefiCpuPkg/Library/MtrrLib/UnitTest/Support.c
+++ b/UefiCpuPkg/Library/MtrrLib/UnitTest/Support.c
@@ -18,6 +18,7 @@ MSR_IA32_MTRR_PHYSMASK_REGISTER              mVariableMtrrsPhysMask[MTRR_NUMBER_
 MSR_IA32_MTRR_DEF_TYPE_REGISTER              mDefTypeMsr;
 MSR_IA32_MTRRCAP_REGISTER                    mMtrrCapMsr;
 MSR_IA32_TME_ACTIVATE_REGISTER               mTmeActivateMsr;
+MSR_IA32_TME_CAPABILITY_REGISTER             mTmeCapabilityMsr;
 CPUID_VERSION_INFO_EDX                       mCpuidVersionInfoEdx;
 CPUID_STRUCTURED_EXTENDED_FEATURE_FLAGS_ECX  mCpuidExtendedFeatureFlagsEcx;
 CPUID_VIR_PHY_ADDRESS_SIZE_EAX               mCpuidVirPhyAddressSizeEax;
@@ -266,6 +267,10 @@ UnitTestMtrrLibAsmReadMsr64 (
     return mTmeActivateMsr.Uint64;
   }
 
+  if (MsrIndex == MSR_IA32_TME_CAPABILITY) {
+    return mTmeCapabilityMsr.Uint64;
+  }
+
   //
   // Should never fall through to here
   //
@@ -393,10 +398,12 @@ InitializeMtrrRegs (
     mCpuidExtendedFeatureFlagsEcx.Bits.TME_EN = 1;
     mTmeActivateMsr.Bits.TmeEnable            = 1;
     mTmeActivateMsr.Bits.MkTmeKeyidBits       = SystemParameter->MkTmeKeyidBits;
+    mTmeCapabilityMsr.Bits.MkTmeMaxKeyidBits  = SystemParameter->MkTmeKeyidBits;
   } else {
     mCpuidExtendedFeatureFlagsEcx.Bits.TME_EN = 0;
     mTmeActivateMsr.Bits.TmeEnable            = 0;
     mTmeActivateMsr.Bits.MkTmeKeyidBits       = 0;
+    mTmeCapabilityMsr.Bits.MkTmeMaxKeyidBits  = 0;
   }
 
   return UNIT_TEST_PASSED;
diff --git a/UefiCpuPkg/Test/UefiCpuPkgHostTest.dsc b/UefiCpuPkg/Test/UefiCpuPkgHostTest.dsc
index e72e4cd622..8f680ef711 100644
--- a/UefiCpuPkg/Test/UefiCpuPkgHostTest.dsc
+++ b/UefiCpuPkg/Test/UefiCpuPkgHostTest.dsc
@@ -32,7 +32,10 @@
   #
   # Build HOST_APPLICATION that tests the MtrrLib
   #
-  UefiCpuPkg/Library/MtrrLib/UnitTest/MtrrLibUnitTestHost.inf
+  UefiCpuPkg/Library/MtrrLib/UnitTest/MtrrLibUnitTestHost.inf {
+    <LibraryClasses>
+      CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf
+  }
 
   #
   # Build HOST_APPLICATION that tests the CpuPageTableLib
-- 
2.31.1.windows.1

Re: [edk2-devel] [PATCH 2/4] PrmPkg: Use new API to replace MtrrLibInitializeMtrrMask

[Michael Kubacki]

Minor comment in code below.

Reviewed-by: Michael Kubacki <michael.kubacki@microsoft.com>

On 6/7/2023 11:06 PM, Zhiguang Liu wrote:
> REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3394
> 
> The function MtrrLibInitializeMtrrMask is a private function
> in MtrrLib.c from UefiCpuPkg, and it can be replace with new
> API GetMaxPlatformAddressBits.
> 
> Cc: Michael Kubacki <mikuback@linux.microsoft.com>
> Cc: Nate DeSimone <nathaniel.l.desimone@intel.com>
> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com>
> ---
>   .../PrmSampleHardwareAccessModule.c            | 18 ++----------------
>   .../PrmSampleHardwareAccessModule.inf          |  1 +
>   2 files changed, 3 insertions(+), 16 deletions(-)
> 
> diff --git a/PrmPkg/Samples/PrmSampleHardwareAccessModule/PrmSampleHardwareAccessModule.c b/PrmPkg/Samples/PrmSampleHardwareAccessModule/PrmSampleHardwareAccessModule.c
> index 1a1e735029..398497c3a9 100644
> --- a/PrmPkg/Samples/PrmSampleHardwareAccessModule/PrmSampleHardwareAccessModule.c
> +++ b/PrmPkg/Samples/PrmSampleHardwareAccessModule/PrmSampleHardwareAccessModule.c
> @@ -13,6 +13,7 @@
>   #include <Library/BaseLib.h>
>   #include <Library/MtrrLib.h>
>   #include <Library/UefiLib.h>
> +#include <Library/CpuLib.h>
>   
>   #include <Register/Intel/ArchitecturalMsr.h>
>   #include <Register/Intel/Cpuid.h>
> @@ -37,21 +38,6 @@
>   //
>   extern CONST CHAR8  *mMtrrMemoryCacheTypeShortName[];
>   
> -/**
> -  Initializes the valid bits mask and valid address mask for MTRRs.
> -
> -  This function initializes the valid bits mask and valid address mask for MTRRs.
> -
> -  @param[out]  MtrrValidBitsMask     The mask for the valid bit of the MTRR
> -  @param[out]  MtrrValidAddressMask  The valid address mask for the MTRR
> -
> -**/
> -VOID
> -MtrrLibInitializeMtrrMask (
> -  OUT UINT64  *MtrrValidBitsMask,
> -  OUT UINT64  *MtrrValidAddressMask
> -  );
> -
>   /**
>     Convert variable MTRRs to a RAW MTRR_MEMORY_RANGE array.
>     One MTRR_MEMORY_RANGE element is created for each MTRR setting.
> @@ -151,7 +137,7 @@ AccessAllMtrrs (
>     MtrrGetAllMtrrs (&LocalMtrrs);
>     Mtrrs = &LocalMtrrs;
>   
> -  MtrrLibInitializeMtrrMask (&MtrrValidBitsMask, &MtrrValidAddressMask);
> +  GetMaxPlatformAddressBits (&MtrrValidBitsMask, &MtrrValidAddressMask);
>     Ranges[0].BaseAddress = 0;
>     Ranges[0].Length      = MtrrValidBitsMask + 1;
>     Ranges[0].Type        = MtrrGetDefaultMemoryType ();
> diff --git a/PrmPkg/Samples/PrmSampleHardwareAccessModule/PrmSampleHardwareAccessModule.inf b/PrmPkg/Samples/PrmSampleHardwareAccessModule/PrmSampleHardwareAccessModule.inf
> index 46d4a88185..b15da817c1 100644
> --- a/PrmPkg/Samples/PrmSampleHardwareAccessModule/PrmSampleHardwareAccessModule.inf
> +++ b/PrmPkg/Samples/PrmSampleHardwareAccessModule/PrmSampleHardwareAccessModule.inf
> @@ -34,6 +34,7 @@
>     MtrrLib
>     UefiDriverEntryPoint
>     UefiLib
> +  CpuLib

Since the library class list was already sorted, can you please sort 
CpuLib within the list?

>   
>   [Depex]
>     TRUE