From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by mx.groups.io with SMTP id smtpd.web11.114.1686245015799958366 for ; Thu, 08 Jun 2023 10:23:35 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@kernel.org header.s=k20201202 header.b=sYQ5zmJr; spf=pass (domain: kernel.org, ip: 139.178.84.217, mailfrom: ardb@kernel.org) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 3594064818; Thu, 8 Jun 2023 17:23:35 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 966EAC433D2; Thu, 8 Jun 2023 17:23:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1686245014; bh=zGDelMM1rdGHiB9m2Y9JFkMGWa8BmdAtF3LetbsirZk=; h=From:To:Cc:Subject:Date:From; b=sYQ5zmJr2Iz2r3YRNM0h8+LxjQ+HidB5X0i+8mwGMjuxW924kPEU//k42U2RUB9n1 3yQ7O1BbN8eUkjztq6DTxxR4zLAvFlo1Hk0zrh99FtPwMBX+fnYNAw0kbRkFAyKYjz Opuufsn5P0So++bHVPpZAJ5z5h2jBBKeAPlFuIA8rEzBBRXttjsN7qpJLiUlbmrKFs mwVqOGAZgiTX4nRAOWk2FPJVVh+bLcNvNR1M10lNgqdCLIr6qBJ8v+D2h5ooBSoGsC n+PPl03XCdz8ATIYAU4hXQuwh+dJeGR+7EVvQtkIofTkveGjPBkZUBSSoin7n56xwB Qq6NYS2YDHSJQ== From: "Ard Biesheuvel" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Ray Ni , Jiewen Yao , Gerd Hoffmann , Taylor Beebe , Oliver Smith-Denny , Dandan Bi , Dun Tan , Liming Gao , "Kinney, Michael D" , Michael Kubacki , Eric Dong , Rahul Kumar , Kun Qin Subject: [PATCH 0/2] UefiCpuPkg/CpuMpPei X64: reallocate page tables in PEI Date: Thu, 8 Jun 2023 19:23:21 +0200 Message-Id: <20230608172323.9096-1-ardb@kernel.org> X-Mailer: git-send-email 2.39.2 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4468=0D =0D Take a step towards enabling a generic approach to manage memory=0D permissions in PEI, by wiring up the existing IA32 page table creation=0D logic in CpuMpPei for X64 as well. This will enable future work to expose=0D a PPI that is available throughout PEI to manage memory permissions in a=0D generic manner across architectures.=0D =0D The DxeIpl that implements this logic today will be made redundant by=0D this, and we should be able to retire it once the replacement pieces are=0D all in place.=0D =0D Cc: Ray Ni =0D Cc: Jiewen Yao =0D Cc: Gerd Hoffmann =0D Cc: Taylor Beebe =0D Cc: Oliver Smith-Denny =0D Cc: Dandan Bi =0D Cc: Dun Tan =0D Cc: Liming Gao =0D Cc: "Kinney, Michael D" =0D Cc: Michael Kubacki =0D Cc: Eric Dong =0D Cc: Rahul Kumar =0D Cc: Kun Qin =0D =0D Ard Biesheuvel (2):=0D UefiCpuPkg/CpuMpPei: Print correct buffer size used for page table=0D UefiCpuPkg/CpuMpPei X64: Reallocate page tables in permanent DRAM=0D =0D UefiCpuPkg/CpuMpPei/CpuMpPei.inf | 2 +=0D UefiCpuPkg/CpuMpPei/CpuPaging.c | 187 ++++++++++++++++----=0D 2 files changed, 151 insertions(+), 38 deletions(-)=0D =0D -- =0D 2.39.2=0D =0D