From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from muminek.juszkiewicz.com.pl (muminek.juszkiewicz.com.pl [213.251.184.221]) by mx.groups.io with SMTP id smtpd.web10.50.1686684569433525770 for ; Tue, 13 Jun 2023 12:29:29 -0700 Authentication-Results: mx.groups.io; dkim=missing; spf=softfail (domain: linaro.org, ip: 213.251.184.221, mailfrom: marcin.juszkiewicz@linaro.org) Received: from localhost (localhost [127.0.0.1]) by muminek.juszkiewicz.com.pl (Postfix) with ESMTP id CFAD926021A; Tue, 13 Jun 2023 21:29:27 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at juszkiewicz.com.pl Received: from muminek.juszkiewicz.com.pl ([127.0.0.1]) by localhost (muminek.juszkiewicz.com.pl [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id qMBnoJIk7bdM; Tue, 13 Jun 2023 21:29:26 +0200 (CEST) Received: from applejack.lan (83.11.39.176.ipv4.supernova.orange.pl [83.11.39.176]) by muminek.juszkiewicz.com.pl (Postfix) with ESMTPSA id 9C552260A8B; Tue, 13 Jun 2023 21:29:24 +0200 (CEST) From: "Marcin Juszkiewicz" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Leif Lindholm , Graeme Gregory , Marcin Juszkiewicz Subject: [PATCH edk2-platforms 2/3] WIP: SbsaQemu: make PCIe variables dynamic (part 2) Date: Tue, 13 Jun 2023 21:28:59 +0200 Message-Id: <20230613192900.158022-3-marcin.juszkiewicz@linaro.org> X-Mailer: git-send-email 2.40.1 In-Reply-To: <20230613192900.158022-1-marcin.juszkiewicz@linaro.org> References: <20230613192900.158022-1-marcin.juszkiewicz@linaro.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Create MCFG table directly from C code instead of ASLC as we cannot use FixedPcd* for PCIe data. --- .../Qemu/SbsaQemu/AcpiTables/AcpiTables.inf | 1 - .../SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf | 9 +++ .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 74 +++++++++++++++++++ Silicon/Qemu/SbsaQemu/AcpiTables/Mcfg.aslc | 43 ----------- 4 files changed, 83 insertions(+), 44 deletions(-) delete mode 100644 Silicon/Qemu/SbsaQemu/AcpiTables/Mcfg.aslc diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf b/Silicon/Qe= mu/SbsaQemu/AcpiTables/AcpiTables.inf index 0501c670d565..5607878c2040 100644 --- a/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf +++ b/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf @@ -20,7 +20,6 @@ [Sources] Dsdt.asl Fadt.aslc Gtdt.aslc - Mcfg.aslc Spcr.aslc =20 [Packages] diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDx= e.inf b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf index c1c33788567d..aad4c8086c40 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf @@ -43,11 +43,20 @@ [LibraryClasses] =20 [Pcd] gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiTableStorageFile + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdClusterCount =20 gArmTokenSpaceGuid.PcdGicDistributorBase gArmTokenSpaceGuid.PcdGicRedistributorsBase + gArmTokenSpaceGuid.PcdPciBusMin + gArmTokenSpaceGuid.PcdPciBusMax + gArmTokenSpaceGuid.PcdPciIoBase + gArmTokenSpaceGuid.PcdPciIoSize + gArmTokenSpaceGuid.PcdPciMmio32Base + gArmTokenSpaceGuid.PcdPciMmio32Size + gArmTokenSpaceGuid.PcdPciMmio64Base + gArmTokenSpaceGuid.PcdPciMmio64Size =20 [Depex] gEfiAcpiTableProtocolGuid ## CONSUMES diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDx= e.c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c index ae5397bab768..af95f7e14672 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c @@ -8,6 +8,7 @@ **/ #include #include +#include #include #include #include @@ -306,6 +307,74 @@ AddSsdtTable ( return Status; } =20 +/* + * A function that adds the MCFG ACPI table. + */ +EFI_STATUS +AddMcfgTable ( + IN EFI_ACPI_TABLE_PROTOCOL *AcpiTable + ) +{ + EFI_STATUS Status; + UINTN TableHandle; + UINT32 TableSize; + EFI_PHYSICAL_ADDRESS PageAddress; + UINT8 *New; + + EFI_ACPI_DESCRIPTION_HEADER Header =3D + SBSAQEMU_ACPI_HEADER ( + EFI_ACPI_6_5_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_AD= DRESS_DESCRIPTION_TABLE_SIGNATURE, + EFI_ACPI_DESCRIPTION_HEADER, + EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_TABLE_REVISION); + + TableSize =3D sizeof (EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRES= S_TABLE_HEADER) + + sizeof(EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_A= DDRESS_ALLOCATION_STRUCTURE); + + Status =3D gBS->AllocatePages ( + AllocateAnyPages, + EfiACPIReclaimMemory, + EFI_SIZE_TO_PAGES (TableSize), + &PageAddress + ); + if (EFI_ERROR(Status)) { + DEBUG ((DEBUG_ERROR, "Failed to allocate pages for MCFG table\n")); + return EFI_OUT_OF_RESOURCES; + } + + New =3D (UINT8 *)(UINTN) PageAddress; + ZeroMem (New, TableSize); + + Header.Length =3D TableSize; + + // Add the ACPI Description table header + CopyMem (New, &Header, sizeof (EFI_ACPI_DESCRIPTION_HEADER)); + New +=3D sizeof (EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TAB= LE_HEADER); + + EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOC= ATION_STRUCTURE *CfgPtr; + + CfgPtr =3D (VOID *)New; + + CfgPtr->BaseAddress =3D PcdGet64 (PcdPciExpressBaseAddress); + CfgPtr->StartBusNumber =3D PcdGet32 (PcdPciBusMin); + CfgPtr->EndBusNumber =3D PcdGet32 (PcdPciBusMax); + CfgPtr->PciSegmentGroupNumber =3D 0; + + // Perform Checksum + AcpiPlatformChecksum ((UINT8*) PageAddress, TableSize); + + Status =3D AcpiTable->InstallAcpiTable ( + AcpiTable, + (EFI_ACPI_COMMON_HEADER *)PageAddress, + TableSize, + &TableHandle + ); + if (EFI_ERROR(Status)) { + DEBUG ((DEBUG_ERROR, "Failed to install MCFG table\n")); + } + + return Status; +} + /* * A function that adds the SSDT ACPI table. */ @@ -443,6 +512,11 @@ InitializeSbsaQemuAcpiDxe ( DEBUG ((DEBUG_ERROR, "Failed to add MADT table\n")); } =20 + Status =3D AddMcfgTable (AcpiTable); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "Failed to add MCFG table\n")); + } + Status =3D AddSsdtTable (AcpiTable); if (EFI_ERROR(Status)) { DEBUG ((DEBUG_ERROR, "Failed to add SSDT table\n")); diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/Mcfg.aslc b/Silicon/Qemu/Sb= saQemu/AcpiTables/Mcfg.aslc deleted file mode 100644 index 289f4ad4ea3a..000000000000 --- a/Silicon/Qemu/SbsaQemu/AcpiTables/Mcfg.aslc +++ /dev/null @@ -1,43 +0,0 @@ -/** @file -* ACPI Memory mapped configuration space base address Description Table= (MCFG). -* -* Copyright (c) 2020, Linaro Limited. All rights reserved. -* -* SPDX-License-Identifier: BSD-2-Clause-Patent -**/ - -#include -#include -#include - -#pragma pack(push, 1) - -typedef struct { - EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_HEADER Header; - EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOC= ATION_STRUCTURE Structure[1]; -} EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TABLE; - -EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TABLE Mcfg= =3D { - { - SBSAQEMU_ACPI_HEADER ( - EFI_ACPI_6_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_AD= DRESS_DESCRIPTION_TABLE_SIGNATURE, - EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TABL= E, - EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_TABLE_REVISION), - EFI_ACPI_RESERVED_QWORD - }, - { - { - FixedPcdGet32 (PcdPciExpressBaseAddress), - 0, - FixedPcdGet32 (PcdPciBusMin), - FixedPcdGet32 (PcdPciBusMax), - EFI_ACPI_RESERVED_DWORD - } - } -}; - -#pragma pack(pop) - -// Reference the table being generated to prevent the optimizer -// from removing the data structure from the executable -VOID* CONST ReferenceAcpiTable =3D &Mcfg; --=20 2.40.1