From: "Sunil V L" <sunilvl@ventanamicro.com>
To: devel@edk2.groups.io
Cc: Sunil V L <sunilvl@ventanamicro.com>,
Ard Biesheuvel <ardb+tianocore@kernel.org>,
Jiewen Yao <jiewen.yao@intel.com>,
Jordan Justen <jordan.l.justen@intel.com>,
Gerd Hoffmann <kraxel@redhat.com>,
Andrei Warkentin <andrei.warkentin@intel.com>
Subject: [PATCH 4/4] OvmfPkg/RiscVVirt: Add a readme for build and test
Date: Wed, 14 Jun 2023 22:31:51 +0530 [thread overview]
Message-ID: <20230614170151.1204982-5-sunilvl@ventanamicro.com> (raw)
In-Reply-To: <20230614170151.1204982-1-sunilvl@ventanamicro.com>
Add a readme file which provides information regarding how
to build and test EDK2 on RISC-V qemu virt platform.
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Andrei Warkentin <andrei.warkentin@intel.com>
---
OvmfPkg/RiscVVirt/README.md | 41 +++++++++++++++++++++++++++++++++++++
1 file changed, 41 insertions(+)
create mode 100644 OvmfPkg/RiscVVirt/README.md
diff --git a/OvmfPkg/RiscVVirt/README.md b/OvmfPkg/RiscVVirt/README.md
new file mode 100644
index 000000000000..a1738658318d
--- /dev/null
+++ b/OvmfPkg/RiscVVirt/README.md
@@ -0,0 +1,41 @@
+# Support for RISC-V qemu virt platform
+
+## Overview
+RISC-V qemu 'virt' is a generic platform which does not correspond to any real
+hardware.
+
+EDK2 for RISC-V virt platform is a payload (S-mode) for a previous stage M-mode
+firmware like opensbi. It follows PEI less design.
+
+## Build
+ export WORKSPACE=`pwd`
+ export GCC5_RISCV64_PREFIX=riscv64-linux-gnu-
+ export PACKAGES_PATH=$WORKSPACE/edk2
+ export EDK_TOOLS_PATH=$WORKSPACE/edk2/BaseTools
+ source edk2/edksetup.sh
+ make -C edk2/BaseTools
+ source edk2/edksetup.sh BaseTools
+ build -a RISCV64 --buildtarget RELEASE -p OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc -t GCC5
+
+## Test
+1) RISC-V qemu pflash devices should be of of size 32MiB.
+
+ `truncate -s 32M Build/RiscVVirtQemu/RELEASE_GCC5/FV/RISCV_VIRT_CODE.fd`
+
+ `truncate -s 32M Build/RiscVVirtQemu/RELEASE_GCC5/FV/RISCV_VIRT_VARS.fd`
+
+2) Run qemu
+
+ qemu-system-riscv64 \
+ -accel tcg -m 4096 -smp 2 \
+ -serial mon:stdio \
+ -device virtio-gpu-pci -full-screen \
+ -device qemu-xhci \
+ -device usb-kbd \
+ -blockdev node-name=pflash0,driver=file,read-only=on,filename=RISCV_VIRT_CODE.fd \
+ -blockdev node-name=pflash1,driver=file,filename=RISCV_VIRT_VARS.fd \
+ -M virt,pflash0=pflash0,pflash1=pflash1,acpi=off \
+ -kernel linux/arch/riscv/boot/Image \
+ -initrd buildroot/output/images/rootfs.cpio \
+ -netdev user,id=net0 -device virtio-net-pci,netdev=net0 \
+ -append "root=/dev/ram rw console=ttyS0 earlycon=uart8250,mmio,0x10000000"
--
2.34.1
next prev parent reply other threads:[~2023-06-14 17:02 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-06-14 17:01 [PATCH 0/4] OvmfPkg/RiscVVirt: Separate code and variable storage Sunil V L
2023-06-14 17:01 ` [PATCH 1/4] OvmfPkg/RiscVVirt: Fix couple of issues in VarStore Sunil V L
2023-06-14 17:01 ` [PATCH 2/4] OvmfPkg/RiscVVirt: Add VirtNorFlashDeviceTreeLib library Sunil V L
2023-06-14 17:01 ` [PATCH 3/4] OvmfPkg/RiscVVirt: Add support for separate code and variable store Sunil V L
2023-06-14 17:01 ` Sunil V L [this message]
2023-06-14 17:11 ` [PATCH 0/4] OvmfPkg/RiscVVirt: Separate code and variable storage Heinrich Schuchardt
2023-06-15 4:26 ` Sunil V L
2023-06-15 11:50 ` Sunil V L
2023-06-15 13:17 ` Heinrich Schuchardt
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