From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mail-pl1-f174.google.com (mail-pl1-f174.google.com [209.85.214.174]) by mx.groups.io with SMTP id smtpd.web10.18171.1686762127896801207 for ; Wed, 14 Jun 2023 10:02:07 -0700 Authentication-Results: mx.groups.io; dkim=pass header.i=@ventanamicro.com header.s=google header.b=VBq6aWP6; spf=pass (domain: ventanamicro.com, ip: 209.85.214.174, mailfrom: sunilvl@ventanamicro.com) Received: by mail-pl1-f174.google.com with SMTP id d9443c01a7336-1b4f95833c7so6531555ad.1 for ; Wed, 14 Jun 2023 10:02:07 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ventanamicro.com; s=google; t=1686762127; x=1689354127; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:from:to:cc:subject:date :message-id:reply-to; bh=IOCanvnLNkJX91eW3WXn/3IZtUyeUhWbG35sleNlC88=; b=VBq6aWP6OH/YiG6QCPs+Hnbl6V7dueBXsDMkkcszXA3bnQjmUfwmh0XcMmxcAstH4d AaKiNgURJseIERiOhwXwsrufJI77oe+jGzjzi7JiGLp44S+6XvOyFf6OyjxugLyYoiy7 HWzin8FglX+WoePwyCTpI+5QGr7v88ASGgJvSceSPx59bcWCU+CL7+YuPnyAxwVS82Go mFfPUeVb7VxwVgTw2825hd2972WlmvuhfkS7nb7hM6O8OZvkDqIA7t7BecSgfwyk9eRz 1ik86IJlqbPaOCeRKbdWYgw8gZBOZFPeVIruZGDNpier95t+HngAuM8gOah5c+lw2Cki jH7w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20221208; t=1686762127; x=1689354127; h=content-transfer-encoding:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:x-gm-message-state:from:to:cc :subject:date:message-id:reply-to; bh=IOCanvnLNkJX91eW3WXn/3IZtUyeUhWbG35sleNlC88=; b=DTmrIFMeQze+ehXjWw633aJPKnnXs11o7ix3gzZBZGqx9xrS6Dz+XeLBlQGkqtf6tj BEJZXjxp0Jah2LOAzB20ZK/MB4xY1lpqVRQyiijA+TPcrww3zfdtadHprpBqqC/wuGcv 8zaCkKfGxgLR5bMq4hV9S4aVxfIByo7/nfo9QTQ+BEJWkun1j7d//Z/J8WlmmqC2NpNY nu2K7aUNaAuTeGbmb4c/6oT77yoTywoE8fo6H/kC/HXhRKNxQZMwX0l/n+sv0AXlCaru fg38nYCssCKQZXlgSAjoTf60IS28+Teu3aOwWf0RHw3ZS/WYlMENn+6LGEMy3vw10mZw deuQ== X-Gm-Message-State: AC+VfDxINCPev3wS0YOrrib4/uzG0jy3fFTd0JzXq2X+2K8IR20MUeVA iNBOWlRwqIqylC6Yk8MUP1+1S5FjvK+oZXc+cdc= X-Google-Smtp-Source: ACHHUZ6MZTjFlGai1QvFJBfCBOGcPfKzOc66VAektasT0T1r1a89CyyaP1myCJj5djtvYV/G0W9zlg== X-Received: by 2002:a17:902:7684:b0:1b3:9d13:34b3 with SMTP id m4-20020a170902768400b001b39d1334b3mr9981008pll.37.1686762126913; Wed, 14 Jun 2023 10:02:06 -0700 (PDT) Return-Path: Received: from kerodi.Dlink ([106.51.184.72]) by smtp.gmail.com with ESMTPSA id s7-20020a170902988700b001b3ef11d8fdsm1850424plp.201.2023.06.14.10.02.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 14 Jun 2023 10:02:06 -0700 (PDT) From: "Sunil V L" To: devel@edk2.groups.io Cc: Sunil V L , Ard Biesheuvel , Jiewen Yao , Jordan Justen , Gerd Hoffmann , Andrei Warkentin Subject: [PATCH 4/4] OvmfPkg/RiscVVirt: Add a readme for build and test Date: Wed, 14 Jun 2023 22:31:51 +0530 Message-Id: <20230614170151.1204982-5-sunilvl@ventanamicro.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230614170151.1204982-1-sunilvl@ventanamicro.com> References: <20230614170151.1204982-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Add a readme file which provides information regarding how to build and test EDK2 on RISC-V qemu virt platform. Signed-off-by: Sunil V L Cc: Ard Biesheuvel Cc: Jiewen Yao Cc: Jordan Justen Cc: Gerd Hoffmann Cc: Andrei Warkentin --- OvmfPkg/RiscVVirt/README.md | 41 +++++++++++++++++++++++++++++++++++++ 1 file changed, 41 insertions(+) create mode 100644 OvmfPkg/RiscVVirt/README.md diff --git a/OvmfPkg/RiscVVirt/README.md b/OvmfPkg/RiscVVirt/README.md new file mode 100644 index 000000000000..a1738658318d --- /dev/null +++ b/OvmfPkg/RiscVVirt/README.md @@ -0,0 +1,41 @@ +# Support for RISC-V qemu virt platform + +## Overview +RISC-V qemu 'virt' is a generic platform which does not correspond to any real +hardware. + +EDK2 for RISC-V virt platform is a payload (S-mode) for a previous stage M-mode +firmware like opensbi. It follows PEI less design. + +## Build + export WORKSPACE=`pwd` + export GCC5_RISCV64_PREFIX=riscv64-linux-gnu- + export PACKAGES_PATH=$WORKSPACE/edk2 + export EDK_TOOLS_PATH=$WORKSPACE/edk2/BaseTools + source edk2/edksetup.sh + make -C edk2/BaseTools + source edk2/edksetup.sh BaseTools + build -a RISCV64 --buildtarget RELEASE -p OvmfPkg/RiscVVirt/RiscVVirtQemu.dsc -t GCC5 + +## Test +1) RISC-V qemu pflash devices should be of of size 32MiB. + + `truncate -s 32M Build/RiscVVirtQemu/RELEASE_GCC5/FV/RISCV_VIRT_CODE.fd` + + `truncate -s 32M Build/RiscVVirtQemu/RELEASE_GCC5/FV/RISCV_VIRT_VARS.fd` + +2) Run qemu + + qemu-system-riscv64 \ + -accel tcg -m 4096 -smp 2 \ + -serial mon:stdio \ + -device virtio-gpu-pci -full-screen \ + -device qemu-xhci \ + -device usb-kbd \ + -blockdev node-name=pflash0,driver=file,read-only=on,filename=RISCV_VIRT_CODE.fd \ + -blockdev node-name=pflash1,driver=file,filename=RISCV_VIRT_VARS.fd \ + -M virt,pflash0=pflash0,pflash1=pflash1,acpi=off \ + -kernel linux/arch/riscv/boot/Image \ + -initrd buildroot/output/images/rootfs.cpio \ + -netdev user,id=net0 -device virtio-net-pci,netdev=net0 \ + -append "root=/dev/ram rw console=ttyS0 earlycon=uart8250,mmio,0x10000000" -- 2.34.1