From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by mx.groups.io with SMTP id smtpd.web10.3285.1686900153837733584 for ; Fri, 16 Jun 2023 00:22:34 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=VMXIOrQZ; spf=pass (domain: intel.com, ip: 192.55.52.120, mailfrom: gavin.xue@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1686900153; x=1718436153; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=dnthWZjRZoUpiFYiaTC8VHp/+57L8uvori0zMSD4BU4=; b=VMXIOrQZgSZwN8bPcRtFcp+UoBUaL7ohCnOnHefQ+MYfb+DgGLKcpbX6 s2CTmW5HywYdCs6nmq8xXVchBN6qmeelZCm326Cd7VIrr0VMIOgcofS8x Ve6n33TqGbj2cWOCTk+cas7ESNZ24MWJ3HK8uq2G9vY0/QH4PhbUE+Bei HlFmRm+m8NGvDUlNmNWhPt7kizi7T+2VFJt42GgP+QbryfBEZDK3OWd+R SwUUSXUDHO0AjY6oty2lc8LMj/UeDKBAJq6XQEUR/0sGEXpNe1ITuFPMe R3uxBVPJVt/9xMQvC2bF5rcq9gPU04+VxoveklX0BaC21qBPbqTZImxra A==; X-IronPort-AV: E=McAfee;i="6600,9927,10742"; a="358025019" X-IronPort-AV: E=Sophos;i="6.00,246,1681196400"; d="scan'208";a="358025019" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Jun 2023 00:22:33 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10742"; a="825637181" X-IronPort-AV: E=Sophos;i="6.00,246,1681196400"; d="scan'208";a="825637181" Received: from ipg-w-xueweixi.ccr.corp.intel.com ([10.239.153.37]) by fmsmga002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Jun 2023 00:22:28 -0700 From: Gavin Xue To: devel@edk2.groups.io Cc: Andrei Warkentin , Sunil V L , Yimin Wang , Alan Sheng Subject: [edk2 PATCH] MdePkg: Use same ProcessorBind symbol define for RISCV64 Date: Fri, 16 Jun 2023 15:22:57 +0800 Message-Id: <20230616072257.1989-1-gavin.xue@intel.com> X-Mailer: git-send-email 2.33.0.windows.1 MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable Different symbol (PROCESSOR_BIND_H__) define in RISCV64 ProcessorBinding.h from other CPU Arch. An unexception compilation error generated if include __PROCESSOR_BIND_H__ symbol in header file for cross-platform compiling. Cc: Andrei Warkentin Cc: Sunil V L Cc: Yimin Wang Cc: Alan Sheng Signed-off-by: Gavin Xue --- MdePkg/Include/RiscV64/ProcessorBind.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/MdePkg/Include/RiscV64/ProcessorBind.h b/MdePkg/Include/RiscV6= 4/ProcessorBind.h index 1d42d92de4..7f24e77b8c 100644 --- a/MdePkg/Include/RiscV64/ProcessorBind.h +++ b/MdePkg/Include/RiscV64/ProcessorBind.h @@ -2,13 +2,14 @@ Processor or Compiler specific defines and types for RISC-V=0D =0D Copyright (c) 2016 - 2020, Hewlett Packard Enterprise Development LP. Al= l rights reserved.
=0D + Copyright (c) 2023, Intel Corporation. All rights reserved.
=0D =0D SPDX-License-Identifier: BSD-2-Clause-Patent=0D =0D **/=0D =0D -#ifndef PROCESSOR_BIND_H__=0D -#define PROCESSOR_BIND_H__=0D +#ifndef __PROCESSOR_BIND_H__=0D +#define __PROCESSOR_BIND_H__=0D =0D ///=0D /// Define the processor type so other code can make processor based choic= es=0D --=20 2.33.0.windows.1