From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by mx.groups.io with SMTP id smtpd.web10.6404.1688707749454802251 for ; Thu, 06 Jul 2023 22:29:10 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=P7HEgYqZ; spf=pass (domain: intel.com, ip: 134.134.136.20, mailfrom: ray.ni@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1688707749; x=1720243749; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=dTwtN5NPSrfcbpFioKZJX8kZgR6ejWZtpJoJwrno1Uk=; b=P7HEgYqZukZhB/R4iTP+JaINyPmyb7SF2bLt2F4OmecqTQNDO5v71I6s fXBXnXwTafR7ZvY0qVx3haal3J4sRD6vL28yKDBKaZhegSOXIZX2NLrrb MBsQwf+xxPiP/zhSqKtKnGnGkTecGVhTIelyxvWRIdHN8nAilAsfoHVOG qs64axng1sacvyCJPVyDNhzAC2Brpf2cbNp6M/Hwgd0E73IK/o/kQwCes Du+EdfG1aCXEdLNRr/4yPxm56cj5Kbbl0D9aG/F44HX8A8QSgV58WV7/J 2tbvX3rkvdRicNGZASn0mum212h6NnZmjpGo+m7lro/rMCCFl1vZeS1GT A==; X-IronPort-AV: E=McAfee;i="6600,9927,10763"; a="353650624" X-IronPort-AV: E=Sophos;i="6.01,187,1684825200"; d="scan'208";a="353650624" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Jul 2023 22:29:09 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10763"; a="833232027" X-IronPort-AV: E=Sophos;i="6.01,187,1684825200"; d="scan'208";a="833232027" Received: from shwdeopenlab706.ccr.corp.intel.com ([10.239.55.95]) by fmsmga002.fm.intel.com with ESMTP; 06 Jul 2023 22:29:08 -0700 From: "Ni, Ray" To: devel@edk2.groups.io Cc: Eric Dong , Rahul Kumar , Gerd Hoffmann Subject: [PATCH 1/4] UefiCpuPkg/MpInitLib: Separate X2APIC enabling to subfunction Date: Fri, 7 Jul 2023 13:28:58 +0800 Message-Id: <20230707052901.869-2-ray.ni@intel.com> X-Mailer: git-send-email 2.39.1.windows.1 In-Reply-To: <20230707052901.869-1-ray.ni@intel.com> References: <20230707052901.869-1-ray.ni@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable It's very confusing that auto X2 APIC enabling and APIC ID sorting are all performed inside CollectProcessorCount(). The change is to separate the X2 APIC enabling to AutoEnableX2Apic() and call that from MpInitLibInitialize(). SortApicId() is called from MpInitLibInitialize() as well. Signed-off-by: Ray Ni Cc: Eric Dong Cc: Rahul Kumar Cc: Gerd Hoffmann --- UefiCpuPkg/Library/MpInitLib/MpLib.c | 65 ++++++++++++++++++---------- 1 file changed, 42 insertions(+), 23 deletions(-) diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpIn= itLib/MpLib.c index f1f2840714..bf80455965 100644 --- a/UefiCpuPkg/Library/MpInitLib/MpLib.c +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c @@ -495,33 +495,20 @@ GetProcessorNumber ( }=0D =0D /**=0D - This function will get CPU count in the system.=0D + Enable x2APIC mode if=0D + 1. Number of CPU is greater than 255; or=0D + 2. There are any logical processors reporting an Initial APIC ID of 255 = or greater.=0D =0D @param[in] CpuMpData Pointer to PEI CPU MP Data=0D -=0D - @return CPU count detected=0D **/=0D -UINTN=0D -CollectProcessorCount (=0D +VOID=0D +AutoEnableX2Apic (=0D IN CPU_MP_DATA *CpuMpData=0D )=0D {=0D + BOOLEAN X2Apic;=0D UINTN Index;=0D CPU_INFO_IN_HOB *CpuInfoInHob;=0D - BOOLEAN X2Apic;=0D -=0D - //=0D - // Send 1st broadcast IPI to APs to wakeup APs=0D - //=0D - CpuMpData->InitFlag =3D ApInitConfig;=0D - WakeUpAP (CpuMpData, TRUE, 0, NULL, NULL, TRUE);=0D - CpuMpData->InitFlag =3D ApInitDone;=0D - //=0D - // When InitFlag =3D=3D ApInitConfig, WakeUpAP () guarantees all APs are= checked in.=0D - // FinishedCount is the number of check-in APs.=0D - //=0D - CpuMpData->CpuCount =3D CpuMpData->FinishedCount + 1;=0D - ASSERT (CpuMpData->CpuCount <=3D PcdGet32 (PcdCpuMaxLogicalProcessorNumb= er));=0D =0D //=0D // Enable x2APIC mode if=0D @@ -570,12 +557,32 @@ CollectProcessorCount ( }=0D =0D DEBUG ((DEBUG_INFO, "APIC MODE is %d\n", GetApicMode ()));=0D +}=0D +=0D +/**=0D + This function will get CPU count in the system.=0D +=0D + @param[in] CpuMpData Pointer to PEI CPU MP Data=0D +=0D + @return CPU count detected=0D +**/=0D +UINTN=0D +CollectProcessorCount (=0D + IN CPU_MP_DATA *CpuMpData=0D + )=0D +{=0D //=0D - // Sort BSP/Aps by CPU APIC ID in ascending order=0D + // Send 1st broadcast IPI to APs to wakeup APs=0D //=0D - SortApicId (CpuMpData);=0D -=0D - DEBUG ((DEBUG_INFO, "MpInitLib: Find %d processors in system.\n", CpuMpD= ata->CpuCount));=0D + CpuMpData->InitFlag =3D ApInitConfig;=0D + WakeUpAP (CpuMpData, TRUE, 0, NULL, NULL, TRUE);=0D + CpuMpData->InitFlag =3D ApInitDone;=0D + //=0D + // When InitFlag =3D=3D ApInitConfig, WakeUpAP () guarantees all APs are= checked in.=0D + // FinishedCount is the number of check-in APs.=0D + //=0D + CpuMpData->CpuCount =3D CpuMpData->FinishedCount + 1;=0D + ASSERT (CpuMpData->CpuCount <=3D PcdGet32 (PcdCpuMaxLogicalProcessorNumb= er));=0D =0D return CpuMpData->CpuCount;=0D }=0D @@ -1976,6 +1983,18 @@ MpInitLibInitialize ( // Wakeup all APs and calculate the processor count in system=0D //=0D CollectProcessorCount (CpuMpData);=0D +=0D + //=0D + // Enable X2APIC if needed.=0D + //=0D + AutoEnableX2Apic (CpuMpData);=0D +=0D + //=0D + // Sort BSP/Aps by CPU APIC ID in ascending order=0D + //=0D + SortApicId (CpuMpData);=0D +=0D + DEBUG ((DEBUG_INFO, "MpInitLib: Find %d processors in system.\n", Cp= uMpData->CpuCount));=0D }=0D } else {=0D //=0D --=20 2.39.1.windows.1