From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga02.intel.com (mga02.intel.com [134.134.136.20]) by mx.groups.io with SMTP id smtpd.web10.6404.1688707749454802251 for ; Thu, 06 Jul 2023 22:29:11 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=L2RA7aTV; spf=pass (domain: intel.com, ip: 134.134.136.20, mailfrom: ray.ni@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1688707751; x=1720243751; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=WGfnO16LRmb74OzqDVzivw7O5npeFZGuNtunKSJAq9A=; b=L2RA7aTVl3ZuzcRrE+xrsbtP2X0zvpxJPI6bERO4og7Xcz8kwIib2jKa z1urJPsZAiNrxOl5ca34BqOyKfJTpJ91Jxw4YoLABSWba+rzavgk+mASn EI6rFIlYDgMonxrrP80VW8hmRlbztQ011V9Q4MaTOrj6MGYXK1QoUqKTv DtRZLPwWJLAdvuMzfgGNxOjGNUk/TfC9frNGVZvYRWRfxciroWexWb3vd //5dXgEG5BPwJjdD9k4a72PPDa8ZKTlODgDL3aQ6MLmdJ+bGPOmJ/I0J8 Pd+vxhmqXB1pUBGIVQbN70fCj/s05XpctsMTVVc450atQeLIEFgM1lyUj w==; X-IronPort-AV: E=McAfee;i="6600,9927,10763"; a="353650640" X-IronPort-AV: E=Sophos;i="6.01,187,1684825200"; d="scan'208";a="353650640" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 06 Jul 2023 22:29:10 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10763"; a="833232032" X-IronPort-AV: E=Sophos;i="6.01,187,1684825200"; d="scan'208";a="833232032" Received: from shwdeopenlab706.ccr.corp.intel.com ([10.239.55.95]) by fmsmga002.fm.intel.com with ESMTP; 06 Jul 2023 22:29:09 -0700 From: "Ni, Ray" To: devel@edk2.groups.io Cc: Eric Dong , Gerd Hoffmann Subject: [PATCH 2/4] UefiCpuPkg/MpInitLib: Sync BSP's APIC mode to APs in InitConfig path Date: Fri, 7 Jul 2023 13:28:59 +0800 Message-Id: <20230707052901.869-3-ray.ni@intel.com> X-Mailer: git-send-email 2.39.1.windows.1 In-Reply-To: <20230707052901.869-1-ray.ni@intel.com> References: <20230707052901.869-1-ray.ni@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable The change saves the BSP's initial APIC mode and syncs to all APs in first time wakeup. It allows certain platforms to switch to X2 APIC as early as possible and also independent on CpuFeaturePei/Dxe. The platform should switch BSP to X2 APIC mode first before the CpuMpPeim runs. Signed-off-by: Ray Ni Cc: Eric Dong Cc: Gerd Hoffmann --- UefiCpuPkg/Library/MpInitLib/MpLib.c | 11 +++++++++++ UefiCpuPkg/Library/MpInitLib/MpLib.h | 11 +++++++++++ 2 files changed, 22 insertions(+) diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpIn= itLib/MpLib.c index bf80455965..2372475a04 100644 --- a/UefiCpuPkg/Library/MpInitLib/MpLib.c +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c @@ -694,6 +694,12 @@ ApWakeupFunction ( ApStackData =3D (AP_STACK_DATA *)((UINTN)ApTopOfStack - sizeof (AP_= STACK_DATA));=0D BistData =3D (UINT32)ApStackData->Bist;=0D =0D + //=0D + // Synchronize APIC mode with BSP in the first time AP wakeup ONLY.= =0D + //=0D + SetApicMode (CpuMpData->InitialBspApicMode);=0D + CurrentApicMode =3D CpuMpData->InitialBspApicMode;=0D +=0D //=0D // CpuMpData->CpuData[0].VolatileRegisters is initialized based on B= SP environment,=0D // to initialize AP in InitConfig path.=0D @@ -1977,6 +1983,11 @@ MpInitLibInitialize ( //=0D ProgramVirtualWireMode ();=0D =0D + //=0D + // Save APIC mode for AP to sync=0D + //=0D + CpuMpData->InitialBspApicMode =3D GetApicMode ();=0D +=0D if (OldCpuMpData =3D=3D NULL) {=0D if (MaxLogicalProcessorNumber > 1) {=0D //=0D diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h b/UefiCpuPkg/Library/MpIn= itLib/MpLib.h index b694c7b40f..1ede253334 100644 --- a/UefiCpuPkg/Library/MpInitLib/MpLib.h +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h @@ -243,6 +243,17 @@ struct _CPU_MP_DATA { //=0D SPIN_LOCK MpLock;=0D UINTN Buffer;=0D + //=0D + // InitialBspApicMode stores the initial BSP APIC mode.=0D + // It is used to synchroneize the BSP APIC mode with APs=0D + // in the first time APs wake up.=0D + // Its value doesn't reflect the current APIC mode since there are=0D + // two cases the APIC mode is changed:=0D + // 1. MpLib explicitly switches to X2 APIC mode because number of thread= s is greater than 255,=0D + // or there are any logical processors reporting an initial APIC ID o= f 255 or greater.=0D + // 2. Some code switches to X2 APIC mode in all threads through MP servi= ces PPI/Protocol.=0D + //=0D + UINTN InitialBspApicMode;=0D UINTN CpuApStackSize;=0D MP_ASSEMBLY_ADDRESS_MAP AddressMap;=0D UINTN WakeupBuffer;=0D --=20 2.39.1.windows.1