From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by mx.groups.io with SMTP id smtpd.web10.32065.1688959036830470108 for <devel@edk2.groups.io>; Sun, 09 Jul 2023 20:17:22 -0700 Authentication-Results: mx.groups.io; dkim=fail reason="unable to parse pub key" header.i=@intel.com header.s=intel header.b=ks1Uxu2/; spf=pass (domain: intel.com, ip: 134.134.136.100, mailfrom: zhiguang.liu@intel.com) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1688959042; x=1720495042; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=vJ4f6tz0D8Ajpxijer1DZbTJgFbrZi/rU97P3+v8DAo=; b=ks1Uxu2/8J+ZMnEH7nOYJX9x9tJd2gVzu3XDtPNSMKV7IQcoAvpKR0wK 0GlAjz5jS5iirhPdheFmcQPK3p9ZIR4H4kxlxiYsP3T3RSrPYGSHTJJbm wvqTo3RQ9wOTbwfG09guqn05rmuoFEsOhunm6Q7ISv0djfZBt5wVu4gbU SRLYTUKLG3tysA5PcOcaJsAJE4yxC9HLlFq+mZIoYwySxNyT57Acz0DNR 0FRkTc5/MhqxTvYFzjfaS+v0eGl3U+21+CaovYN4+cnt8+H9J/MX1O3wz +5s6AGT1M3m1qFQwTnvujahvyk0u+Tap4Wa7Di+xddApixWreIh/u586h w==; X-IronPort-AV: E=McAfee;i="6600,9927,10766"; a="430319108" X-IronPort-AV: E=Sophos;i="6.01,193,1684825200"; d="scan'208";a="430319108" Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Jul 2023 20:17:21 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10766"; a="834113172" X-IronPort-AV: E=Sophos;i="6.01,193,1684825200"; d="scan'208";a="834113172" Received: from shwdesfp01.ccr.corp.intel.com ([10.239.158.151]) by fmsmga002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Jul 2023 20:17:19 -0700 From: "Zhiguang Liu" <zhiguang.liu@intel.com> To: devel@edk2.groups.io Cc: Zhiguang Liu <zhiguang.liu@intel.com>, Ard Biesheuvel <ardb+tianocore@kernel.org>, Jiewen Yao <jiewen.yao@intel.com>, Jordan Justen <jordan.l.justen@intel.com>, Gerd Hoffmann <kraxel@redhat.com>, Anthony Perard <anthony.perard@citrix.com>, Julien Grall <julien@xen.org> Subject: [PATCH 3/4] OvmfPkg: Remove applicationProcessorEntryPoint Date: Mon, 10 Jul 2023 11:17:05 +0800 Message-Id: <20230710031706.1329-4-zhiguang.liu@intel.com> X-Mailer: git-send-email 2.31.1.windows.1 In-Reply-To: <20230710031706.1329-1-zhiguang.liu@intel.com> References: <20230710031706.1329-1-zhiguang.liu@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4494 Current reset vector uses 0xffffffe0 as AP waking vector, and expects GenFv generates code aligned on a 4k boundary which will jump to this location. However, some issues are listed below 1. GenFV doesn't generate code as the comment expects, because GenFv assumes no modifications are required to the VTF-0 'Volume Top File'. 2. Even if removing VFT0 signature and let GenFv to modify, Genfv is hard-code using another flash address 0xffffffd0. 3. In the same patch series, AP waking vector code is removed from GenFv, because no such usage anymore. The existing of first two issues also approve the usage is not available for a long time. Therefore, remove AP waking vector related code. Cc: Ard Biesheuvel <ardb+tianocore@kernel.org> Cc: Jiewen Yao <jiewen.yao@intel.com> Cc: Jordan Justen <jordan.l.justen@intel.com> Cc: Gerd Hoffmann <kraxel@redhat.com> Cc: Anthony Perard <anthony.perard@citrix.com> Cc: Julien Grall <julien@xen.org> Signed-off-by: Zhiguang Liu <zhiguang.liu@intel.com> --- OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm | 15 +++------------ OvmfPkg/XenResetVector/Ia16/ResetVectorVtf0.asm | 16 +++------------- 2 files changed, 6 insertions(+), 25 deletions(-) diff --git a/OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm b/OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm index 12f2cedd67..8f94da89f7 100644 --- a/OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm +++ b/OvmfPkg/ResetVector/Ia16/ResetVectorVtf0.asm @@ -160,22 +160,13 @@ guidedStructureEnd: ALIGN 16 -applicationProcessorEntryPoint: ; -; Application Processors entry point +; 0xffffffe0 ; -; GenFv generates code aligned on a 4k boundary which will jump to this -; location. (0xffffffe0) This allows the Local APIC Startup IPI to be -; used to wake up the application processors. -; - jmp EarlyApInitReal16 - -ALIGN 8 - - DD 0 + DD 0, 0, 0 ; -; The VTF signature +; The VTF signature (0xffffffec) ; ; VTF-0 means that the VTF (Volume Top File) code does not require ; any fixups. diff --git a/OvmfPkg/XenResetVector/Ia16/ResetVectorVtf0.asm b/OvmfPkg/XenResetVector/Ia16/ResetVectorVtf0.asm index 56749bdbc9..67156d8252 100644 --- a/OvmfPkg/XenResetVector/Ia16/ResetVectorVtf0.asm +++ b/OvmfPkg/XenResetVector/Ia16/ResetVectorVtf0.asm @@ -39,23 +39,13 @@ xenPVHEntryPoint: BITS 16 ALIGN 16 - -applicationProcessorEntryPoint: -; -; Application Processors entry point ; -; GenFv generates code aligned on a 4k boundary which will jump to this -; location. (0xffffffe0) This allows the Local APIC Startup IPI to be -; used to wake up the application processors. +; 0xffffffe0 ; - jmp EarlyApInitReal16 - -ALIGN 8 - - DD 0 + DD 0, 0, 0 ; -; The VTF signature +; The VTF signature (0xffffffec) ; ; VTF-0 means that the VTF (Volume Top File) code does not require ; any fixups. -- 2.31.1.windows.1