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From: "Tuan Phan" <tphan@ventanamicro.com>
To: devel@edk2.groups.io
Cc: michael.d.kinney@intel.com, gaoliming@byosoft.com.cn,
	zhiguang.liu@intel.com, sunilvl@ventanamicro.com,
	git@danielschaefer.me, andrei.warkentin@intel.com,
	ardb+tianocore@kernel.org, Tuan Phan <tphan@ventanamicro.com>
Subject: [PATCH v5 4/7] OvmfPkg/RiscVVirt: SEC: Add IO memory resource hob for platform devices
Date: Fri, 14 Jul 2023 12:08:21 -0700	[thread overview]
Message-ID: <20230714190824.16552-5-tphan@ventanamicro.com> (raw)
In-Reply-To: <20230714190824.16552-1-tphan@ventanamicro.com>

Normally, DXE driver would add device resource to GCD before start using.
But some key resources such as uart used for printing info at very early
stage.

Those resources should be populated to HOB in SEC phase so they are
added to GCD before MMU enabled.

Signed-off-by: Tuan Phan <tphan@ventanamicro.com>
Reviewed-by: Andrei Warkentin <andrei.warkentin@intel.com>
---
 OvmfPkg/RiscVVirt/Sec/Platform.c | 62 ++++++++++++++++++++++++++++++++
 1 file changed, 62 insertions(+)

diff --git a/OvmfPkg/RiscVVirt/Sec/Platform.c b/OvmfPkg/RiscVVirt/Sec/Platform.c
index 3645c27b0b12..c66432473067 100644
--- a/OvmfPkg/RiscVVirt/Sec/Platform.c
+++ b/OvmfPkg/RiscVVirt/Sec/Platform.c
@@ -21,6 +21,64 @@ SPDX-License-Identifier: BSD-2-Clause-Patent
 #include <libfdt.h>
 #include <Guid/FdtHob.h>
 
+/**
+  Build memory map I/O range resource HOB using the
+  base address and size.
+
+  @param  MemoryBase     Memory map I/O base.
+  @param  MemorySize     Memory map I/O size.
+
+**/
+STATIC
+VOID
+AddIoMemoryBaseSizeHob (
+  EFI_PHYSICAL_ADDRESS  MemoryBase,
+  UINT64                MemorySize
+  )
+{
+  /* Align to EFI_PAGE_SIZE */
+  MemorySize = ALIGN_VALUE (MemorySize, EFI_PAGE_SIZE);
+  BuildResourceDescriptorHob (
+    EFI_RESOURCE_MEMORY_MAPPED_IO,
+    EFI_RESOURCE_ATTRIBUTE_PRESENT     |
+    EFI_RESOURCE_ATTRIBUTE_INITIALIZED |
+    EFI_RESOURCE_ATTRIBUTE_UNCACHEABLE |
+    EFI_RESOURCE_ATTRIBUTE_TESTED,
+    MemoryBase,
+    MemorySize
+    );
+}
+
+/**
+  Populate IO resources from FDT that not added to GCD by its
+  driver in the DXE phase.
+
+  @param  FdtBase       Fdt base address
+  @param  Compatible    Compatible string
+
+**/
+STATIC
+VOID
+PopulateIoResources (
+  VOID         *FdtBase,
+  CONST CHAR8  *Compatible
+  )
+{
+  UINT64  *Reg;
+  INT32   Node, LenP;
+
+  Node = fdt_node_offset_by_compatible (FdtBase, -1, Compatible);
+  while (Node != -FDT_ERR_NOTFOUND) {
+    Reg = (UINT64 *)fdt_getprop (FdtBase, Node, "reg", &LenP);
+    if (Reg) {
+      ASSERT (LenP == (2 * sizeof (UINT64)));
+      AddIoMemoryBaseSizeHob (SwapBytes64 (Reg[0]), SwapBytes64 (Reg[1]));
+    }
+
+    Node = fdt_node_offset_by_compatible (FdtBase, Node, Compatible);
+  }
+}
+
 /**
   @retval EFI_SUCCESS            The address of FDT is passed in HOB.
           EFI_UNSUPPORTED        Can't locate FDT.
@@ -80,5 +138,9 @@ PlatformPeimInitialization (
 
   BuildFvHob (PcdGet32 (PcdOvmfDxeMemFvBase), PcdGet32 (PcdOvmfDxeMemFvSize));
 
+  PopulateIoResources (Base, "ns16550a");
+  PopulateIoResources (Base, "qemu,fw-cfg-mmio");
+  PopulateIoResources (Base, "virtio,mmio");
+
   return EFI_SUCCESS;
 }
-- 
2.25.1


  parent reply	other threads:[~2023-07-14 19:08 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-07-14 19:08 [PATCH v5 0/7] Add RISC-V MMU support Tuan Phan
2023-07-14 19:08 ` [PATCH v5 1/7] MdePkg/BaseLib: RISC-V: Support getting satp register value Tuan Phan
2023-07-14 19:08 ` [PATCH v5 2/7] MdePkg/Register: RISC-V: Add satp mode bits shift definition Tuan Phan
2023-07-14 19:08 ` [PATCH v5 3/7] OvmfPkg/RiscVVirt: VirtNorFlashPlatformLib: Fix wrong flash size Tuan Phan
2023-07-14 19:08 ` Tuan Phan [this message]
2023-07-14 19:08 ` [PATCH v5 5/7] OvmfPkg/RiscVVirt: Add VirtNorFlashDxe to APRIORI list Tuan Phan
2023-07-14 19:08 ` [PATCH v5 6/7] OvmfPkg: RiscVVirt: Remove satp bare mode setting Tuan Phan
2023-07-14 19:08 ` [PATCH v5 7/7] UefiCpuPkg: RISC-V: Support MMU with SV39/48/57 mode Tuan Phan

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