From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id B3D3B7803D1 for ; Thu, 27 Jul 2023 02:21:08 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=cawh/oUsbCIKdWyYZE4T0XBf/aY4WlLr+X9GamN1BIQ=; c=relaxed/simple; d=groups.io; h=X-Received:X-Received:X-IronPort-AV:X-IronPort-AV:X-Received:X-ExtLoop1:X-IronPort-AV:X-IronPort-AV:X-Received:From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:X-Gm-Message-State:Content-Transfer-Encoding; s=20140610; t=1690424467; v=1; b=P0zoufvODFR+5SSfPpqBjtjFT4vGuzEhSdPEzkxScYrIabitPOm+YN6BYbYCJumXCmzjE9Et b/UlVNsYM4I+nqbZ5UCA68Vz0c4CDz9bj+qbSu8fu9Np7Uu+7JBKBuAVfT4paBswpcjZhL+o+jl RGGJBBH813Zr7C/pOK5Tp2cs= X-Received: by 127.0.0.2 with SMTP id 7iO3YY7687511xoxvYA2Vlxu; Wed, 26 Jul 2023 19:21:07 -0700 X-Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by mx.groups.io with SMTP id smtpd.web11.4235.1690424456424173367 for ; Wed, 26 Jul 2023 19:21:06 -0700 X-IronPort-AV: E=McAfee;i="6600,9927,10783"; a="399122637" X-IronPort-AV: E=Sophos;i="6.01,233,1684825200"; d="scan'208";a="399122637" X-Received: from orsmga008.jf.intel.com ([10.7.209.65]) by fmsmga101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Jul 2023 19:21:06 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10783"; a="756460977" X-IronPort-AV: E=Sophos;i="6.01,233,1684825200"; d="scan'208";a="756460977" X-Received: from shwdeopenlab702.ccr.corp.intel.com ([10.239.55.158]) by orsmga008-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Jul 2023 19:21:05 -0700 From: "duntan" To: devel@edk2.groups.io Cc: Eric Dong , Ray Ni , Rahul Kumar Subject: [edk2-devel] [PATCH 4/5] UefiCpuPkg/PiSmmCpuDxe: code refinement for CpuS3.c Date: Thu, 27 Jul 2023 10:20:39 +0800 Message-Id: <20230727022040.1910-5-dun.tan@intel.com> In-Reply-To: <20230727022040.1910-1-dun.tan@intel.com> References: <20230727022040.1910-1-dun.tan@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,dun.tan@intel.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: AAxxY9q5rdWfaJ27CSXaeWggx7686176AA= Content-Transfer-Encoding: 8bit X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=P0zoufvO; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=intel.com (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io This commit is code logic refinement for CpuS3.c. It doesn't change any code functionality. In this commit, abstract the function originally executed by BSP into a new InitializeBsp(). Also prepare the AP StartupVector and send InitSipiSipi in SmmRestoreCpu() when mAcpiCpuData is valid. Or only InitializeBsp will be executed by BSP. This can make the code logic easier to understand. Signed-off-by: Dun Tan Cc: Eric Dong Cc: Ray Ni Cc: Rahul Kumar --- UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c | 110 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++----------------------------------------------- 1 file changed, 63 insertions(+), 47 deletions(-) diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c index 0f7ee0372d..d2e2135d08 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/CpuS3.c @@ -627,6 +627,7 @@ PrepareApStartupVector ( mExchangeInfo->BufferStart = (UINT32)StartupVector; mExchangeInfo->Cr3 = (UINT32)(AsmReadCr3 ()); mExchangeInfo->InitializeFloatingPointUnitsAddress = (UINTN)InitializeFloatingPointUnits; + mExchangeInfo->ApFunction = (VOID *)(UINTN)InitializeAp; } /** @@ -647,27 +648,6 @@ InitializeCpuBeforeRebase ( ProgramVirtualWireMode (); - PrepareApStartupVector (mAcpiCpuData.StartupVector); - - if (FeaturePcdGet (PcdCpuHotPlugSupport)) { - ASSERT (mNumberOfCpus <= mAcpiCpuData.NumberOfCpus); - } else { - ASSERT (mNumberOfCpus == mAcpiCpuData.NumberOfCpus); - } - - mNumberToFinish = (UINT32)(mNumberOfCpus - 1); - mExchangeInfo->ApFunction = (VOID *)(UINTN)InitializeAp; - - // - // Execute code for before SmmBaseReloc. Note: This flag is maintained across S3 boots. - // - mInitApsAfterSmmBaseReloc = FALSE; - - // - // Send INIT IPI - SIPI to all APs - // - SendInitSipiSipiAllExcludingSelf ((UINT32)mAcpiCpuData.StartupVector); - while (mNumberToFinish > 0) { CpuPause (); } @@ -714,6 +694,54 @@ InitializeCpuAfterRebase ( } } +/** + Procedure for BSP to do the cpu initialization. + +**/ +VOID +InitializeBsp ( + VOID + ) +{ + // + // Skip initialization if mAcpiCpuData is not valid + // + if (mAcpiCpuData.NumberOfCpus > 0) { + // + // First time microcode load and restore MTRRs + // + InitializeCpuBeforeRebase (); + } + + DEBUG ((DEBUG_INFO, "SmmRestoreCpu: mSmmRelocated is %d\n", mSmmRelocated)); + + // + // Check whether Smm Relocation is done or not. + // If not, will do the SmmBases Relocation here!!! + // + if (!mSmmRelocated) { + // + // Restore SMBASE for BSP and all APs + // + SmmRelocateBases (); + } else { + // + // Issue SMI IPI (All Excluding Self SMM IPI + BSP SMM IPI) to execute first SMI init. + // + ExecuteFirstSmiInit (); + } + + // + // Skip initialization if mAcpiCpuData is not valid + // + if (mAcpiCpuData.NumberOfCpus > 0) { + // + // Restore MSRs for BSP and all APs + // + InitializeCpuAfterRebase (); + } +} + /** Restore SMM Configuration in S3 boot path. @@ -814,43 +842,31 @@ SmmRestoreCpu ( } // - // Skip initialization if mAcpiCpuData is not valid + // Skip AP initialization if mAcpiCpuData is not valid // if (mAcpiCpuData.NumberOfCpus > 0) { - // - // First time microcode load and restore MTRRs - // - InitializeCpuBeforeRebase (); - } + if (FeaturePcdGet (PcdCpuHotPlugSupport)) { + ASSERT (mNumberOfCpus <= mAcpiCpuData.NumberOfCpus); + } else { + ASSERT (mNumberOfCpus == mAcpiCpuData.NumberOfCpus); + } - DEBUG ((DEBUG_INFO, "SmmRestoreCpu: mSmmRelocated is %d\n", mSmmRelocated)); + mNumberToFinish = (UINT32)(mNumberOfCpus - 1); - // - // Check whether Smm Relocation is done or not. - // If not, will do the SmmBases Relocation here!!! - // - if (!mSmmRelocated) { - // - // Restore SMBASE for BSP and all APs - // - SmmRelocateBases (); - } else { // - // Issue SMI IPI (All Excluding Self SMM IPI + BSP SMM IPI) to execute first SMI init. + // Execute code for before SmmBaseReloc. Note: This flag is maintained across S3 boots. // - ExecuteFirstSmiInit (); - } + mInitApsAfterSmmBaseReloc = FALSE; - // - // Skip initialization if mAcpiCpuData is not valid - // - if (mAcpiCpuData.NumberOfCpus > 0) { + PrepareApStartupVector (mAcpiCpuData.StartupVector); // - // Restore MSRs for BSP and all APs + // Send INIT IPI - SIPI to all APs // - InitializeCpuAfterRebase (); + SendInitSipiSipiAllExcludingSelf ((UINT32)mAcpiCpuData.StartupVector); } + InitializeBsp (); + // // Set a flag to restore SMM configuration in S3 path. // -- 2.31.1.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#107282): https://edk2.groups.io/g/devel/message/107282 Mute This Topic: https://groups.io/mt/100383962/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=-=-=-=-=-=-=-=-=-=-=-