From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id 2AF38AC09A7 for ; Sun, 13 Aug 2023 04:36:59 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=+wBa+yAkiTKme+wHFqyabZCBDIQj7JGRFL5cUT9Q8nM=; c=relaxed/simple; d=groups.io; h=ARC-Seal:ARC-Message-Signature:ARC-Authentication-Results:Received-SPF:From:To:CC:Subject:Date:Message-ID:In-Reply-To:References:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Transfer-Encoding:Content-Type; s=20140610; t=1691901417; v=1; b=oOxSzYaFR4GJyOaXWzKTH7h6ffc9CIQISZlBBbNjiG0gSmLPbNZVcbcMTH7rUaAe+2Sux0jI bJ84ctJ+PB5Jiy+3OU8WulPLMwTmvIEm2JtYpI+iYULEL/QcmsQ7KoZsse7me44O4M1sE2ue+7T aVUptpKW+nzVC/o114T9SfB0= X-Received: by 127.0.0.2 with SMTP id 6kXUYY7687511xd4vVn5dYEH; Sat, 12 Aug 2023 21:36:57 -0700 X-Received: from NAM10-DM6-obe.outbound.protection.outlook.com (NAM10-DM6-obe.outbound.protection.outlook.com [40.107.93.72]) by mx.groups.io with SMTP id smtpd.web10.80501.1691901417180048655 for ; Sat, 12 Aug 2023 21:36:57 -0700 ARC-Seal: i=1; a=rsa-sha256; s=arcselector9901; d=microsoft.com; cv=none; b=nslI5IT8yrVFvPgPho047wMfaZB/EhKFUD6uVVrh/2NyXiyzVxdXZGrUbXcNy/cRvK1XqFlpatCNYWhzd2BbiUyCAm0dx4xWi13eEoqTuWoYQk7aVE1TxwHcPv4GRDgEMBtd8kzMIL0TB1NOE8BweQGCZqeMjwX84TjhDE6Z/nnSx5UzLVR0ebf+Q5UnMWxA/kWdXUSD/K3k/yhJRg+Eiw9ARN+t0rN+sZtZ/57I1nNpZ+YEtwB/0hKE619zsKbsffPdEkJ7UGB6XZrYM1KKWV7tsDdeKChcVAuxwERn7cwGGZlgjWVNwer+vMzLmaid2i2gLh6AG1HGTxxVZBgZIA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector9901; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=xx+lZ5TUJyKzkpZTwj6Oo3FOx1RedYkhlY3VmvzbjPw=; b=QbtrsGwApAqUtfERosyodP1bCkMj/tBhbqOWS3JzxUXBQuxiAzGE3G/hBQHyswfAbn3At/naBZutvE+edN2AGYnPHGhz/Sg7iwonKu+Bkw+Aa0M77D0nbbbbXOzeWnD5h0FWgazG+LSif4ITilRZxqMc0nxtqFQDQ4tK7fUgimFJVBoBPshoj5QtDHVw5OyDyzAO5wDtsC7qXSboHIB2ik3ndBbgx0xnxoRta+v/Gzd3qm3ihGZwnB1dJp9v1S1Nnxsrpfy64/9hwGvsrOJT0rhy76KJZraZ/PqsojWQviqhWJfMdYGzDqVsHY5J0yEm9T2MyL+8E/MWAxWr8FH2CA== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 165.204.84.17) smtp.rcpttodomain=edk2.groups.io smtp.mailfrom=amd.com; dmarc=pass (p=quarantine sp=quarantine pct=100) action=none header.from=amd.com; dkim=none (message not signed); arc=none X-Received: from CYZPR02CA0021.namprd02.prod.outlook.com (2603:10b6:930:a1::18) by MN2PR12MB4095.namprd12.prod.outlook.com (2603:10b6:208:1d1::11) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6678.24; Sun, 13 Aug 2023 04:36:53 +0000 X-Received: from CY4PEPF0000EDD1.namprd03.prod.outlook.com (2603:10b6:930:a1:cafe::14) by CYZPR02CA0021.outlook.office365.com (2603:10b6:930:a1::18) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.6652.33 via Frontend Transport; Sun, 13 Aug 2023 04:36:53 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; pr=C X-Received: from SATLEXMB04.amd.com (165.204.84.17) by CY4PEPF0000EDD1.mail.protection.outlook.com (10.167.241.205) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.6699.12 via Frontend Transport; Sun, 13 Aug 2023 04:36:53 +0000 X-Received: from TPE-L1-ABNCHANG.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.27; Sat, 12 Aug 2023 23:36:51 -0500 From: "Chang, Abner via groups.io" To: CC: Michael D Kinney , Liming Gao , Zhiguang Liu , "Abdul Lateef Attar" Subject: [edk2-devel] [PATCH V3 1/6] MdePkg/Include: Update definitions of SPI related header files Date: Sun, 13 Aug 2023 12:36:25 +0800 Message-ID: <20230813043630.1123-2-abner.chang@amd.com> In-Reply-To: <20230813043630.1123-1-abner.chang@amd.com> References: <20230813043630.1123-1-abner.chang@amd.com> MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CY4PEPF0000EDD1:EE_|MN2PR12MB4095:EE_ X-MS-Office365-Filtering-Correlation-Id: a05daef6-1002-4240-8a8f-08db9bb6eb37 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam-Message-Info: dL3quXiFK4xzSGTf9TU04Z5hsdSRvT2IGk5ZIkvAAUFfLv3QdwXtpvRy42w9n7Nj3aMGP7bkKiGGjriihUIJRn0I8KCu+ff8dzL14lO6xwAf/havEdMgm/R6LJJQtsWevXQ1IwVgXgXQ0ZUji5GUQ30WHSmuJXEpiSmJsFgMNfXpyZ0HZLM/L8k3Y/KK3AF4//BJ6kkmP7kLMAHui3mp3uw8Zl1nxIrhZhqie0aV9L7QlfDYcP8ac6KxA3HwyOL/iYKNgkI5pnq9vzLmk7RQONTk+HCuDpL81wFhxvtypt3rgimK54zD7dSEnU2vWNMsOdANu9D3sKqf3Mb7na8Bd8AnPpwYuDmYWFrO+W3psrrlOZkBn+uk9DQtyfQZQZdzChqkgIh8v1CM385GILUnj8Ygno/1AlfVDgVJ6xCW62zswB8UOYk1HmX6zOt8DRTTWeb59A4SsQ655j/2OU4ow6qoMGRM2gnTnP24YB5h/oA/KaHklvT1Tbr69r5EspOyWG4RvNW2Br1uI1EayraIQdXAQpHfUNOr4O8QC0X+jjxcsGTT8QR0nj1XUTLiZi1m6vuV/xNS1FTyQIH6Ks1UgGXSSGio+SCe6PB4bFmG5gQ48wxo26zvXXvETk0I58sZPQnFnIfyhUGUTrkyDMfMPAJUrVxVm3FeWqbniRXqB/V7HRSbjsbvVCi1zb6zDZ3IvvbWhTHwI4oDJ9R+gjsto6YgoJfO97guJ8SoXyKSGJHS1BcVgBmVWTLP2LdBLaP/f7PvxP8yjuIfpLsTEH+6zA== X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Aug 2023 04:36:53.4446 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: a05daef6-1002-4240-8a8f-08db9bb6eb37 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CY4PEPF0000EDD1.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MN2PR12MB4095 Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,abner.chang@amd.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: XHpc4Cb3p29hGDIZpz5r6L3gx7686176AA= Content-Transfer-Encoding: quoted-printable Content-Type: text/plain X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=oOxSzYaF; arc=reject ("signature check failed: fail, {[1] = sig:microsoft.com:reject}"); dmarc=none; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io From: Abner Chang BZ#: 4471 Update definitions according to PI spec v1.8 Errata as it is approved in PIWG (Ticket #2394). Signed-off-by: Abner Chang Cc: Michael D Kinney Cc: Liming Gao Cc: Zhiguang Liu Cc: Abdul Lateef Attar --- MdePkg/Include/Protocol/SpiConfiguration.h | 8 ++++++++ MdePkg/Include/Protocol/SpiHc.h | 14 ++++++++++++++ MdePkg/Include/Protocol/SpiIo.h | 10 ++++++++++ 3 files changed, 32 insertions(+) diff --git a/MdePkg/Include/Protocol/SpiConfiguration.h b/MdePkg/Include/Pr= otocol/SpiConfiguration.h index 3f8fb9ff62c..cffdc8e232d 100644 --- a/MdePkg/Include/Protocol/SpiConfiguration.h +++ b/MdePkg/Include/Protocol/SpiConfiguration.h @@ -2,6 +2,7 @@ This file defines the SPI Configuration Protocol. =20 Copyright (c) 2017, Intel Corporation. All rights reserved.
+ Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved. SPDX-License-Identifier: BSD-2-Clause-Patent =20 @par Revision Reference: @@ -168,6 +169,13 @@ typedef struct _EFI_SPI_BUS { VOID *ClockParameter; } EFI_SPI_BUS; =20 +/// +/// Definitions of SPI Part Attributes. +/// +#define SPI_PART_SUPPORTS_2_BIT_DATA_BUS_WIDTH BIT0 +#define SPl_PART_SUPPORTS_4_B1T_DATA_BUS_WIDTH BIT1 +#define SPl_PART_SUPPORTS_8_B1T_DATA_BUS_WIDTH BIT2 + /// /// The EFI_SPI_PERIPHERAL data structure describes how a specific block o= f /// logic which is connected to the SPI bus. This data structure also sele= cts diff --git a/MdePkg/Include/Protocol/SpiHc.h b/MdePkg/Include/Protocol/SpiH= c.h index 30128dd5c4d..645bfdefe9b 100644 --- a/MdePkg/Include/Protocol/SpiHc.h +++ b/MdePkg/Include/Protocol/SpiHc.h @@ -2,6 +2,7 @@ This file defines the SPI Host Controller Protocol. =20 Copyright (c) 2017, Intel Corporation. All rights reserved.
+ Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved. SPDX-License-Identifier: BSD-2-Clause-Patent =20 @par Revision Reference: @@ -121,6 +122,19 @@ typedef EFI_STATUS IN EFI_SPI_BUS_TRANSACTION *BusTransaction ); =20 +/// +/// Definitions of SPI Host Controller Attributes. +/// +#define HC_SUPPORTS_WRITE_ONLY_OPERATIONS BIT0 +#define HC_SUPPORTS_READ_ONLY_OPERATIONS BIT1 +#define HC_SUPPORTS_WRITE_THEN_READ_OPERATIONS BIT2 +#define HC_TX_FRAME_IN_MOST_SIGNIFICANT_BITS BIT3 +#define HC_RX_FRAME_IN_MOST_SIGNIFICANT_BITS BIT4 +#define HC_SUPPORTS_2_BIT_DATA_BUS_WIDTH BIT5 +#define HC_SUPPORTS_4_BIT_DATA_BUS_WIDTH BIT6 +#define HC_SUPPORTS_8_BIT_DATA_BUS_WIDTH BIT7 +#define HC_TRANSFER_SIZE_INCLUDES_OPCODE BIT8 +#define HC_TRANSFER_SIZE_INCLUDES_ADDRESS BIT9 /// /// Support a SPI data transaction between the SPI controller and a SPI ch= ip. /// diff --git a/MdePkg/Include/Protocol/SpiIo.h b/MdePkg/Include/Protocol/SpiI= o.h index b4fc5e03b88..0ea881fd115 100644 --- a/MdePkg/Include/Protocol/SpiIo.h +++ b/MdePkg/Include/Protocol/SpiIo.h @@ -2,6 +2,7 @@ This file defines the SPI I/O Protocol. =20 Copyright (c) 2017, Intel Corporation. All rights reserved.
+ Copyright (C) 2023 Advanced Micro Devices, Inc. All rights reserved. SPDX-License-Identifier: BSD-2-Clause-Patent =20 @par Revision Reference: @@ -223,6 +224,15 @@ typedef struct _EFI_SPI_BUS_TRANSACTION { UINT8 *ReadBuffer; } EFI_SPI_BUS_TRANSACTION; =20 +/// +/// Definitions of SPI I/O Attributes. +/// +#define SPI_IO_SUPPORTS_2_BIT_DATA_BUS_WIDTH BIT0 +#define SPI_IO_SUPPORTS_4_BIT_DATA_BUS_WIDTH BIT1 +#define SPI_IO_SUPPORTS_8_BIT_DATA_BUS_WIDTH BIT2 +#define SPI_IO_TRANSFER_SIZE_INCLUDES_OPCODE BIT3 +#define SPI_IO_TRANSFER_SIZE_INCLUDES_ADDRESS BIT4 + /// /// Support managed SPI data transactions between the SPI controller and a= SPI /// chip. --=20 2.37.1.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#107720): https://edk2.groups.io/g/devel/message/107720 Mute This Topic: https://groups.io/mt/100713985/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-