From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id 62D197803CE for ; Wed, 13 Sep 2023 04:27:12 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=aSFjeRe+kVDQbXhF8IQjNUlDT1fXZvNsI2v/rcakA0s=; c=relaxed/simple; d=groups.io; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Transfer-Encoding; s=20140610; t=1694579231; v=1; b=KQJQSbM2+zo6ToUYrUYcv83mJZAziRFYbbAJrDNSMTAZtmoG+sy/E+04NQRcnxidh2D+DSqA BDJEaeNs0fLhzX39qzbCuxG8y0QaAaH1RlqgH45U2Kjgyohk5K8O/3yL28T6kf/2M5SN0qFGOHT rI6gC1zLecyhZRif+CbBTD0I= X-Received: by 127.0.0.2 with SMTP id 6p2yYY7687511xKpjLnkoodg; Tue, 12 Sep 2023 21:27:11 -0700 X-Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.126]) by mx.groups.io with SMTP id smtpd.web11.4645.1694579216558329653 for ; Tue, 12 Sep 2023 21:27:10 -0700 X-IronPort-AV: E=McAfee;i="6600,9927,10831"; a="363595431" X-IronPort-AV: E=Sophos;i="6.02,142,1688454000"; d="scan'208";a="363595431" X-Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Sep 2023 21:27:10 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10831"; a="859093630" X-IronPort-AV: E=Sophos;i="6.02,142,1688454000"; d="scan'208";a="859093630" X-Received: from shwdeopenlab705.ccr.corp.intel.com ([10.239.55.100]) by fmsmga002-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Sep 2023 21:27:08 -0700 From: "Yuanhao Xie" To: devel@edk2.groups.io Cc: Ray Ni , Eric Dong , Rahul Kumar , Gerd Hoffmann Subject: [edk2-devel] [PATCH 05/16] UefiCpuPkg/MtrrUnitTest: Update test to cover no-fixed-mtrr cases. Date: Wed, 13 Sep 2023 12:26:28 +0800 Message-Id: <20230913042639.2066-6-yuanhao.xie@intel.com> In-Reply-To: <20230913042639.2066-1-yuanhao.xie@intel.com> References: <20230913042639.2066-1-yuanhao.xie@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,yuanhao.xie@intel.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: NEyMrS0Xe6vPkN8fdgvXraoPx7686176AA= Content-Transfer-Encoding: 8bit X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=KQJQSbM2; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=intel.com (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io From: Ray Ni Signed-off-by: Ray Ni Cc: Eric Dong Cc: Rahul Kumar Cc: Gerd Hoffmann --- UefiCpuPkg/Library/MtrrLib/UnitTest/MtrrLibUnitTest.c | 43 ++++++++++++++++++++++++------------------- UefiCpuPkg/Library/MtrrLib/UnitTest/Support.c | 24 +++++++++++++++--------- 2 files changed, 39 insertions(+), 28 deletions(-) diff --git a/UefiCpuPkg/Library/MtrrLib/UnitTest/MtrrLibUnitTest.c b/UefiCpuPkg/Library/MtrrLib/UnitTest/MtrrLibUnitTest.c index 293f3bc7b5..13cebee32b 100644 --- a/UefiCpuPkg/Library/MtrrLib/UnitTest/MtrrLibUnitTest.c +++ b/UefiCpuPkg/Library/MtrrLib/UnitTest/MtrrLibUnitTest.c @@ -13,25 +13,30 @@ STATIC CONST MTRR_LIB_SYSTEM_PARAMETER mDefaultSystemParameter = { }; STATIC MTRR_LIB_SYSTEM_PARAMETER mSystemParameters[] = { - { 38, TRUE, TRUE, CacheUncacheable, 12 }, - { 38, TRUE, TRUE, CacheWriteBack, 12 }, - { 38, TRUE, TRUE, CacheWriteThrough, 12 }, - { 38, TRUE, TRUE, CacheWriteProtected, 12 }, - { 38, TRUE, TRUE, CacheWriteCombining, 12 }, - - { 42, TRUE, TRUE, CacheUncacheable, 12 }, - { 42, TRUE, TRUE, CacheWriteBack, 12 }, - { 42, TRUE, TRUE, CacheWriteThrough, 12 }, - { 42, TRUE, TRUE, CacheWriteProtected, 12 }, - { 42, TRUE, TRUE, CacheWriteCombining, 12 }, - - { 48, TRUE, TRUE, CacheUncacheable, 12 }, - { 48, TRUE, TRUE, CacheWriteBack, 12 }, - { 48, TRUE, TRUE, CacheWriteThrough, 12 }, - { 48, TRUE, TRUE, CacheWriteProtected, 12 }, - { 48, TRUE, TRUE, CacheWriteCombining, 12 }, - - { 48, TRUE, TRUE, CacheWriteBack, 12, 7}, // 7 bits for MKTME + { 38, TRUE, TRUE, CacheUncacheable, 12 }, + { 38, TRUE, TRUE, CacheWriteBack, 12 }, + { 38, TRUE, TRUE, CacheWriteThrough, 12 }, + { 38, TRUE, TRUE, CacheWriteProtected, 12 }, + { 38, TRUE, TRUE, CacheWriteCombining, 12 }, + + { 42, TRUE, TRUE, CacheUncacheable, 12 }, + { 42, TRUE, TRUE, CacheWriteBack, 12 }, + { 42, TRUE, TRUE, CacheWriteThrough, 12 }, + { 42, TRUE, TRUE, CacheWriteProtected, 12 }, + { 42, TRUE, TRUE, CacheWriteCombining, 12 }, + + { 48, TRUE, TRUE, CacheUncacheable, 12 }, + { 48, TRUE, TRUE, CacheWriteBack, 12 }, + { 48, TRUE, TRUE, CacheWriteThrough, 12 }, + { 48, TRUE, TRUE, CacheWriteProtected, 12 }, + { 48, TRUE, TRUE, CacheWriteCombining, 12 }, + + { 48, TRUE, FALSE, CacheUncacheable, 12 }, + { 48, TRUE, FALSE, CacheWriteBack, 12 }, + { 48, TRUE, FALSE, CacheWriteThrough, 12 }, + { 48, TRUE, FALSE, CacheWriteProtected, 12 }, + { 48, TRUE, FALSE, CacheWriteCombining, 12 }, + { 48, TRUE, TRUE, CacheWriteBack, 12, 7}, // 7 bits for MKTME }; UINT32 mFixedMtrrsIndex[] = { diff --git a/UefiCpuPkg/Library/MtrrLib/UnitTest/Support.c b/UefiCpuPkg/Library/MtrrLib/UnitTest/Support.c index ba1de10034..7df5b9745f 100644 --- a/UefiCpuPkg/Library/MtrrLib/UnitTest/Support.c +++ b/UefiCpuPkg/Library/MtrrLib/UnitTest/Support.c @@ -43,7 +43,6 @@ Rand ( if (mRandomInput) { return rand (); } else { - DEBUG ((DEBUG_INFO, "random: %d\n", mNumberIndex)); return mNumbers[mNumberIndex++ % (mNumberCount - 1)]; } } @@ -236,8 +235,11 @@ UnitTestMtrrLibAsmReadMsr64 ( { UINT32 Index; + UT_ASSERT_EQUAL (mCpuidVersionInfoEdx.Bits.MTRR, 1); + for (Index = 0; Index < ARRAY_SIZE (mFixedMtrrsValue); Index++) { if (MsrIndex == mFixedMtrrsIndex[Index]) { + UT_ASSERT_EQUAL (mMtrrCapMsr.Bits.FIX, 1); return mFixedMtrrsValue[Index]; } } @@ -245,6 +247,7 @@ UnitTestMtrrLibAsmReadMsr64 ( if ((MsrIndex >= MSR_IA32_MTRR_PHYSBASE0) && (MsrIndex <= MSR_IA32_MTRR_PHYSMASK0 + (MTRR_NUMBER_OF_VARIABLE_MTRR << 1))) { + UT_ASSERT_TRUE (((MsrIndex - MSR_IA32_MTRR_PHYSBASE0) >> 1) < mMtrrCapMsr.Bits.VCNT); if (MsrIndex % 2 == 0) { Index = (MsrIndex - MSR_IA32_MTRR_PHYSBASE0) >> 1; return mVariableMtrrsPhysBase[Index].Uint64; @@ -299,8 +302,11 @@ UnitTestMtrrLibAsmWriteMsr64 ( { UINT32 Index; + UT_ASSERT_EQUAL (mCpuidVersionInfoEdx.Bits.MTRR, 1); + for (Index = 0; Index < ARRAY_SIZE (mFixedMtrrsValue); Index++) { if (MsrIndex == mFixedMtrrsIndex[Index]) { + UT_ASSERT_EQUAL (mMtrrCapMsr.Bits.FIX, 1); mFixedMtrrsValue[Index] = Value; return Value; } @@ -309,6 +315,7 @@ UnitTestMtrrLibAsmWriteMsr64 ( if ((MsrIndex >= MSR_IA32_MTRR_PHYSBASE0) && (MsrIndex <= MSR_IA32_MTRR_PHYSMASK0 + (MTRR_NUMBER_OF_VARIABLE_MTRR << 1))) { + UT_ASSERT_TRUE (((MsrIndex - MSR_IA32_MTRR_PHYSBASE0) >> 1) < mMtrrCapMsr.Bits.VCNT); if (MsrIndex % 2 == 0) { Index = (MsrIndex - MSR_IA32_MTRR_PHYSBASE0) >> 1; mVariableMtrrsPhysBase[Index].Uint64 = Value; @@ -321,6 +328,10 @@ UnitTestMtrrLibAsmWriteMsr64 ( } if (MsrIndex == MSR_IA32_MTRR_DEF_TYPE) { + if (((MSR_IA32_MTRR_DEF_TYPE_REGISTER *)&Value)->Bits.FE == 1) { + UT_ASSERT_EQUAL (mMtrrCapMsr.Bits.FIX, 1); + } + mDefTypeMsr.Uint64 = Value; return Value; } @@ -353,17 +364,12 @@ InitializeMtrrRegs ( SetMem (mFixedMtrrsValue, sizeof (mFixedMtrrsValue), SystemParameter->DefaultCacheType); for (Index = 0; Index < ARRAY_SIZE (mVariableMtrrsPhysBase); Index++) { - mVariableMtrrsPhysBase[Index].Uint64 = 0; - mVariableMtrrsPhysBase[Index].Bits.Type = SystemParameter->DefaultCacheType; - mVariableMtrrsPhysBase[Index].Bits.Reserved1 = 0; - - mVariableMtrrsPhysMask[Index].Uint64 = 0; - mVariableMtrrsPhysMask[Index].Bits.V = 0; - mVariableMtrrsPhysMask[Index].Bits.Reserved1 = 0; + mVariableMtrrsPhysBase[Index].Uint64 = 0; + mVariableMtrrsPhysMask[Index].Uint64 = 0; } mDefTypeMsr.Bits.E = 1; - mDefTypeMsr.Bits.FE = 1; + mDefTypeMsr.Bits.FE = 0; mDefTypeMsr.Bits.Type = SystemParameter->DefaultCacheType; mDefTypeMsr.Bits.Reserved1 = 0; mDefTypeMsr.Bits.Reserved2 = 0; -- 2.36.1.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. 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