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contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,sami.mujawar@arm.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: LtOBxCZBZScyAcbmQNxxZTIHx7686176AA= Content-Type: text/plain X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=w4Y+yOqs; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=arm.com (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io The Coresight Embedded Trace Extension (ETE) feature can be detected by the platform firmware by examining the debug feature register ID_AA64DFR0_EL1.TraceVer field. The platform configuration manager can then describe the ETE by creating CM_ARM_ET_INFO object(s) and referencing these in CM_ARM_GICC_INFO.EtToken. The 'Table 3: Compatible IDs for architected CoreSight components' in the 'ACPI for CoreSight 1.2 Platform Design Document' specifies the HID value for Coresight ETE and CoreSight Embedded Trace Macrocell (ETM) v4.x as ARMH C500. Therefore, update the SsdtCpuTopologyGenerator to add an ETE device to the CPU node in the AML CPU hierarchy so that an OS can utilise this information. Note: Although ETE and ETM share the same HID, ETE has a system register interfaces, unlike ETM which requires memory mapped registers. Since this patch aims to support ETE, the AML description does not describe any memory mapped registers. However, support for ETM can be added in the future. Signed-off-by: Sami Mujawar --- Notes: v2: - No code change from v1 patch series. [SAMI] DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c | 186 +++++++++++++++++++- DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.h | 11 +- 2 files changed, 195 insertions(+), 2 deletions(-) diff --git a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c index 6fb131b664820adca63c9efa6d8b0e17fc64284e..6fbba12a010bf987797f0901a032735e8e0be598 100644 --- a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c +++ b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.c @@ -1,11 +1,17 @@ /** @file SSDT Cpu Topology Table Generator. - Copyright (c) 2021, Arm Limited. All rights reserved.
+ Copyright (c) 2021 - 2023, Arm Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent @par Reference(s): - ACPI 6.3 Specification - January 2019 - s8.4 Declaring Processors + - ACPI for CoreSight version 1.2 Platform Design Document + (https://developer.arm.com/documentation/den0067/a/?lang=en) + + @par Glossary: + - ETE - Embedded Trace Extension. + - ETM - Embedded Trace Macrocell. **/ #include @@ -35,6 +41,7 @@ Requirements: - EArmObjProcHierarchyInfo (OPTIONAL) along with - EArmObjCmRef (OPTIONAL) - EArmObjLpiInfo (OPTIONAL) + - GetEArmObjEtInfo (OPTIONAL) */ /** This macro expands to a function that retrieves the GIC @@ -86,6 +93,16 @@ GET_OBJECT_LIST ( CM_ARM_CPC_INFO ); +/** + This macro expands to a function that retrieves the ET device + information from the Configuration Manager. +*/ +GET_OBJECT_LIST ( + EObjNameSpaceArm, + EArmObjEtInfo, + CM_ARM_ET_INFO + ); + /** Initialize the TokenTable. One entry should be allocated for each CM_ARM_PROC_HIERARCHY_INFO @@ -326,6 +343,144 @@ CreateAmlCpcNode ( return Status; } +/** Create an embedded trace device and add it to the Cpu Node in the + AML namespace. + + This generates the following ASL code: + Device (E002) + { + Name (_UID, 2) + Name (_HID, "ARMHC500") + } + + Note: Currently we only support generating ETE nodes. Unlike ETM, + ETE has a system register interface and therefore does not need + the MMIO range to be described. + + @param [in] Generator The SSDT Cpu Topology generator. + @param [in] ParentNode Parent node to attach the Cpu node to. + @param [in] CpuName Value used to generate the node name. + @param [out] EtNodePtr If not NULL, return the created Cpu node. + + @retval EFI_SUCCESS Success. + @retval EFI_INVALID_PARAMETER Invalid parameter. + @retval EFI_OUT_OF_RESOURCES Failed to allocate memory. +**/ +STATIC +EFI_STATUS +EFIAPI +CreateAmlEtd ( + IN ACPI_CPU_TOPOLOGY_GENERATOR *Generator, + IN AML_NODE_HANDLE ParentNode, + IN UINT32 CpuName, + OUT AML_OBJECT_NODE_HANDLE *EtNodePtr OPTIONAL + ) +{ + EFI_STATUS Status; + AML_OBJECT_NODE_HANDLE EtNode; + CHAR8 AslName[AML_NAME_SEG_SIZE + 1]; + + ASSERT (Generator != NULL); + ASSERT (ParentNode != NULL); + + Status = WriteAslName ('E', CpuName, AslName); + if (EFI_ERROR (Status)) { + ASSERT (0); + return Status; + } + + Status = AmlCodeGenDevice (AslName, ParentNode, &EtNode); + if (EFI_ERROR (Status)) { + ASSERT (0); + return Status; + } + + Status = AmlCodeGenNameInteger ( + "_UID", + CpuName, + EtNode, + NULL + ); + if (EFI_ERROR (Status)) { + ASSERT (0); + return Status; + } + + Status = AmlCodeGenNameString ( + "_HID", + ACPI_HID_ET_DEVICE, + EtNode, + NULL + ); + if (EFI_ERROR (Status)) { + ASSERT (0); + return Status; + } + + // If requested, return the handle to the EtNode. + if (EtNodePtr != NULL) { + *EtNodePtr = EtNode; + } + + return Status; +} + +/** Create and add an Embedded trace device to the Cpu Node. + + @param [in] Generator The SSDT Cpu Topology generator. + @param [in] CfgMgrProtocol Pointer to the Configuration Manager + Protocol Interface. + @param [in] GicCInfo Pointer to the CM_ARM_GICC_INFO object + describing the Cpu. + @param [in] CpuName Value used to generate the CPU node name. + @param [in] Node CPU Node to which the ET device node is + attached. + + @retval EFI_SUCCESS The function completed successfully. + @retval EFI_UNSUPPORTED Feature Unsupported. + @retval EFI_INVALID_PARAMETER Invalid parameter. + @retval EFI_OUT_OF_RESOURCES Failed to allocate memory. +**/ +STATIC +EFI_STATUS +EFIAPI +CreateAmlEtNode ( + IN ACPI_CPU_TOPOLOGY_GENERATOR *Generator, + IN CONST EDKII_CONFIGURATION_MANAGER_PROTOCOL *CONST CfgMgrProtocol, + IN CM_ARM_GICC_INFO *GicCInfo, + IN UINT32 CpuName, + IN AML_OBJECT_NODE_HANDLE *Node + ) +{ + EFI_STATUS Status; + CM_ARM_ET_INFO *EtInfo; + + Status = GetEArmObjEtInfo ( + CfgMgrProtocol, + GicCInfo->EtToken, + &EtInfo, + NULL + ); + if (EFI_ERROR (Status)) { + ASSERT (0); + return Status; + } + + // Currently we only support creation of a ETE Node. + if (EtInfo->EtType != ArmEtTypeEte) { + return EFI_UNSUPPORTED; + } + + Status = CreateAmlEtd ( + Generator, + Node, + CpuName, + NULL + ); + ASSERT_EFI_ERROR (Status); + return Status; +} + /** Create and add an _LPI method to Cpu/Cluster Node. For instance, transform an AML node from: @@ -694,6 +849,21 @@ CreateAmlCpuFromProcHierarchy ( } } + // Add an Embedded Trace node if present. + if (GicCInfo->EtToken != CM_NULL_TOKEN) { + Status = CreateAmlEtNode ( + Generator, + CfgMgrProtocol, + GicCInfo, + CpuName, + CpuNode + ); + if (EFI_ERROR (Status)) { + ASSERT_EFI_ERROR (Status); + return Status; + } + } + return Status; } @@ -1135,6 +1305,20 @@ CreateTopologyFromGicC ( break; } } + + if (GicCInfo[Index].EtToken != CM_NULL_TOKEN) { + Status = CreateAmlEtNode ( + Generator, + CfgMgrProtocol, + &GicCInfo[Index], + Index, + CpuNode + ); + if (EFI_ERROR (Status)) { + ASSERT_EFI_ERROR (Status); + return Status; + } + } } // for return Status; diff --git a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.h b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.h index 48e4455490e9a211e8d4e0a18adcf079fd5d2d24..0c7a0b0601ab221bc416ecb4be436c0dafca1824 100644 --- a/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.h +++ b/DynamicTablesPkg/Library/Acpi/Arm/AcpiSsdtCpuTopologyLibArm/SsdtCpuTopologyGenerator.h @@ -1,11 +1,17 @@ /** @file SSDT Cpu Topology Table Generator. - Copyright (c) 2021, Arm Limited. All rights reserved.
+ Copyright (c) 2021 - 2023, Arm Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent @par Reference(s): - ACPI 6.3 Specification - January 2019 - s8.4 Declaring Processors + - ACPI for CoreSight version 1.2 Platform Design Document + (https://developer.arm.com/documentation/den0067/a/?lang=en) + + @par Glossary: + - ETE - Embedded Trace Extension. + - ETM - Embedded Trace Macrocell. **/ #ifndef SSDT_CPU_TOPOLOGY_GENERATOR_H_ @@ -49,6 +55,9 @@ /// HID for a processor device. #define ACPI_HID_PROCESSOR_DEVICE "ACPI0007" +/// HID for a ETM/ETE device. +#define ACPI_HID_ET_DEVICE "ARMHC500" + /// HID for a processor container device. #define ACPI_HID_PROCESSOR_CONTAINER_DEVICE "ACPI0010" -- 'Guid(CE165669-3EF3-493F-B85D-6190EE5B9759)' -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#108593): https://edk2.groups.io/g/devel/message/108593 Mute This Topic: https://groups.io/mt/101335846/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=-=-=-=-=-=-=-=-=-=-=-