* [edk2-devel] [PATCH] BaseTools/GenFw: Add support for LOONGARCH64 relax relocation
@ 2023-09-22 7:27 Dongyan Qian
2023-09-22 7:33 ` Chao Li
0 siblings, 1 reply; 2+ messages in thread
From: Dongyan Qian @ 2023-09-22 7:27 UTC (permalink / raw)
To: devel; +Cc: Rebecca Cran, Liming Gao, Bob Feng, Yuwei Chen, Chao Li
Correct relax id from 99 to 100 and added relocation support up to 109
fix gcc14 adds new relocation, and the generated relocation
causes the build and compilation to fail.
REF: https://bugzilla.tianocore.org/show_bug.cgi?id=4559
Cc: Rebecca Cran <rebecca@bsdio.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Bob Feng <bob.c.feng@intel.com>
Cc: Yuwei Chen <yuwei.chen@intel.com>
Cc: Chao Li <lichao@loongson.cn>
Signed-off-by: Dongyan Qian <qiandongyan@loongson.cn>
---
BaseTools/Source/C/GenFw/Elf64Convert.c | 20 ++++++++++++++++++++
BaseTools/Source/C/GenFw/elf_common.h | 13 ++++++++++++-
2 files changed, 32 insertions(+), 1 deletion(-)
diff --git a/BaseTools/Source/C/GenFw/Elf64Convert.c b/BaseTools/Source/C/GenFw/Elf64Convert.c
index d53ecb1767..9911db65af 100644
--- a/BaseTools/Source/C/GenFw/Elf64Convert.c
+++ b/BaseTools/Source/C/GenFw/Elf64Convert.c
@@ -1778,7 +1778,17 @@ WriteSections64 (
case R_LARCH_TLS_LD64_HI20:
case R_LARCH_TLS_GD_PC_HI20:
case R_LARCH_TLS_GD64_HI20:
+ case R_LARCH_32_PCREL:
case R_LARCH_RELAX:
+ case R_LARCH_DELETE:
+ case R_LARCH_ALIGN:
+ case R_LARCH_PCREL20_S2:
+ case R_LARCH_CFA:
+ case R_LARCH_ADD6:
+ case R_LARCH_SUB6:
+ case R_LARCH_ADD_ULEB128:
+ case R_LARCH_SUB_ULEB128:
+ case R_LARCH_64_PCREL:
//
// These types are not used or do not require fixup.
//
@@ -2185,7 +2195,17 @@ WriteRelocations64 (
case R_LARCH_TLS_LD64_HI20:
case R_LARCH_TLS_GD_PC_HI20:
case R_LARCH_TLS_GD64_HI20:
+ case R_LARCH_32_PCREL:
case R_LARCH_RELAX:
+ case R_LARCH_DELETE:
+ case R_LARCH_ALIGN:
+ case R_LARCH_PCREL20_S2:
+ case R_LARCH_CFA:
+ case R_LARCH_ADD6:
+ case R_LARCH_SUB6:
+ case R_LARCH_ADD_ULEB128:
+ case R_LARCH_SUB_ULEB128:
+ case R_LARCH_64_PCREL:
//
// These types are not used or do not require fixup in PE format files.
//
diff --git a/BaseTools/Source/C/GenFw/elf_common.h b/BaseTools/Source/C/GenFw/elf_common.h
index ccd32804b0..e4d0cdac4f 100644
--- a/BaseTools/Source/C/GenFw/elf_common.h
+++ b/BaseTools/Source/C/GenFw/elf_common.h
@@ -1144,5 +1144,16 @@ typedef struct {
#define R_LARCH_TLS_LD64_HI20 96
#define R_LARCH_TLS_GD_PC_HI20 97
#define R_LARCH_TLS_GD64_HI20 98
-#define R_LARCH_RELAX 99
+#define R_LARCH_32_PCREL 99
+#define R_LARCH_RELAX 100
+#define R_LARCH_DELETE 101
+#define R_LARCH_ALIGN 102
+#define R_LARCH_PCREL20_S2 103
+#define R_LARCH_CFA 104
+#define R_LARCH_ADD6 105
+#define R_LARCH_SUB6 106
+#define R_LARCH_ADD_ULEB128 107
+#define R_LARCH_SUB_ULEB128 108
+#define R_LARCH_64_PCREL 109
+
#endif /* !_SYS_ELF_COMMON_H_ */
--
2.27.0
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* Re: [edk2-devel] [PATCH] BaseTools/GenFw: Add support for LOONGARCH64 relax relocation
2023-09-22 7:27 [edk2-devel] [PATCH] BaseTools/GenFw: Add support for LOONGARCH64 relax relocation Dongyan Qian
@ 2023-09-22 7:33 ` Chao Li
0 siblings, 0 replies; 2+ messages in thread
From: Chao Li @ 2023-09-22 7:33 UTC (permalink / raw)
To: devel, qiandongyan; +Cc: Rebecca Cran, Liming Gao, Bob Feng, Yuwei Chen
[-- Attachment #1: Type: text/plain, Size: 3832 bytes --]
Reviewed-by: Chao Li <lichao@loongson.cn>
Thanks,
Chao
在 2023/9/22 15:27, Dongyan Qian 写道:
> Correct relax id from 99 to 100 and added relocation support up to 109
>
> fix gcc14 adds new relocation, and the generated relocation
> causes the build and compilation to fail.
> REF:https://bugzilla.tianocore.org/show_bug.cgi?id=4559
>
> Cc: Rebecca Cran<rebecca@bsdio.com>
> Cc: Liming Gao<gaoliming@byosoft.com.cn>
> Cc: Bob Feng<bob.c.feng@intel.com>
> Cc: Yuwei Chen<yuwei.chen@intel.com>
> Cc: Chao Li<lichao@loongson.cn>
> Signed-off-by: Dongyan Qian<qiandongyan@loongson.cn>
> ---
> BaseTools/Source/C/GenFw/Elf64Convert.c | 20 ++++++++++++++++++++
> BaseTools/Source/C/GenFw/elf_common.h | 13 ++++++++++++-
> 2 files changed, 32 insertions(+), 1 deletion(-)
>
> diff --git a/BaseTools/Source/C/GenFw/Elf64Convert.c b/BaseTools/Source/C/GenFw/Elf64Convert.c
> index d53ecb1767..9911db65af 100644
> --- a/BaseTools/Source/C/GenFw/Elf64Convert.c
> +++ b/BaseTools/Source/C/GenFw/Elf64Convert.c
> @@ -1778,7 +1778,17 @@ WriteSections64 (
> case R_LARCH_TLS_LD64_HI20:
> case R_LARCH_TLS_GD_PC_HI20:
> case R_LARCH_TLS_GD64_HI20:
> + case R_LARCH_32_PCREL:
> case R_LARCH_RELAX:
> + case R_LARCH_DELETE:
> + case R_LARCH_ALIGN:
> + case R_LARCH_PCREL20_S2:
> + case R_LARCH_CFA:
> + case R_LARCH_ADD6:
> + case R_LARCH_SUB6:
> + case R_LARCH_ADD_ULEB128:
> + case R_LARCH_SUB_ULEB128:
> + case R_LARCH_64_PCREL:
> //
> // These types are not used or do not require fixup.
> //
> @@ -2185,7 +2195,17 @@ WriteRelocations64 (
> case R_LARCH_TLS_LD64_HI20:
> case R_LARCH_TLS_GD_PC_HI20:
> case R_LARCH_TLS_GD64_HI20:
> + case R_LARCH_32_PCREL:
> case R_LARCH_RELAX:
> + case R_LARCH_DELETE:
> + case R_LARCH_ALIGN:
> + case R_LARCH_PCREL20_S2:
> + case R_LARCH_CFA:
> + case R_LARCH_ADD6:
> + case R_LARCH_SUB6:
> + case R_LARCH_ADD_ULEB128:
> + case R_LARCH_SUB_ULEB128:
> + case R_LARCH_64_PCREL:
> //
> // These types are not used or do not require fixup in PE format files.
> //
> diff --git a/BaseTools/Source/C/GenFw/elf_common.h b/BaseTools/Source/C/GenFw/elf_common.h
> index ccd32804b0..e4d0cdac4f 100644
> --- a/BaseTools/Source/C/GenFw/elf_common.h
> +++ b/BaseTools/Source/C/GenFw/elf_common.h
> @@ -1144,5 +1144,16 @@ typedef struct {
> #define R_LARCH_TLS_LD64_HI20 96
> #define R_LARCH_TLS_GD_PC_HI20 97
> #define R_LARCH_TLS_GD64_HI20 98
> -#define R_LARCH_RELAX 99
> +#define R_LARCH_32_PCREL 99
> +#define R_LARCH_RELAX 100
> +#define R_LARCH_DELETE 101
> +#define R_LARCH_ALIGN 102
> +#define R_LARCH_PCREL20_S2 103
> +#define R_LARCH_CFA 104
> +#define R_LARCH_ADD6 105
> +#define R_LARCH_SUB6 106
> +#define R_LARCH_ADD_ULEB128 107
> +#define R_LARCH_SUB_ULEB128 108
> +#define R_LARCH_64_PCREL 109
> +
> #endif /* !_SYS_ELF_COMMON_H_ */
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