From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id CD7A2AC1735 for ; Fri, 22 Sep 2023 13:42:04 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=ZB1DONA4XQ5Zdw920QYG7NK9Tr8sqRZ1j50n/rMsejo=; c=relaxed/simple; d=groups.io; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Transfer-Encoding; s=20140610; t=1695390123; v=1; b=M0ng6EvKa42UH00/DlBjNsM/AEeLVgBiOv4LBhvxW+68fmeV386zRV7SOaSbS/AaiDGD7rb2 u9pw1lWfrV+r3c3mvx8BqPxP6XfUD5IJOV0//uPFuHI9G+Gz+azPrd7rZT3KyNQXEYhJ1p4pl5H RD6esYHQD78M+uM1rbnzE2Yk= X-Received: by 127.0.0.2 with SMTP id g1xkYY7687511xMTi1V6Gxpv; Fri, 22 Sep 2023 06:42:03 -0700 X-Received: from sgoci-sdnproxy-4.icoremail.net (sgoci-sdnproxy-4.icoremail.net [129.150.39.64]) by mx.groups.io with SMTP id smtpd.web10.21448.1695390121279206600 for ; Fri, 22 Sep 2023 06:42:02 -0700 X-Received: from prodtpl.icoremail.net (unknown [10.12.1.20]) by hzbj-icmmx-6 (Coremail) with SMTP id AQAAfwAXUpajmQ1lT3sPAw--.13727S2; Fri, 22 Sep 2023 21:41:55 +0800 (CST) X-Received: from phytium.com.cn (unknown [123.150.8.50]) by mail (Coremail) with SMTP id AQAAfwC3zXmfmQ1lF1IAAA--.334S4; Fri, 22 Sep 2023 21:41:54 +0800 (CST) From: "Yuquan Wang" To: devel@edk2.groups.io Cc: ardb+tianocore@kernel.org, quic_llindhol@quicinc.com, chenbaozi@phytium.com.cn, Yuquan Wang Subject: [edk2-devel] [PATCH edk2-platforms v3 1/1] Platform/SbsaQemu: add XHCI support and replace EHCI Date: Fri, 22 Sep 2023 21:41:15 +0800 Message-Id: <20230922134115.326726-2-wangyuquan1236@phytium.com.cn> In-Reply-To: <20230922134115.326726-1-wangyuquan1236@phytium.com.cn> References: <20230922134115.326726-1-wangyuquan1236@phytium.com.cn> MIME-Version: 1.0 X-CM-TRANSID: AQAAfwC3zXmfmQ1lF1IAAA--.334S4 X-CM-SenderInfo: 5zdqw5pxtxt0arstlqxsk13x1xpou0fpof0/1tbiAQAKAWUMlaoG5QAAs- X-Coremail-Antispam: 1Uk129KBjvJXoW3Xw4xXr4rCry7WFW7tw18Xwb_yoW3Kw4fpF 10vFZ3Cr48Gry3tw43G3WrZF4YkFyayr4kGrs0qr18CwsxJF1UXr45KFy0yF9rJFnxXw1D Cr10v34jyF4ru3DanT9S1TB71UUUUUUqnTZGkaVYY2UrUUUUj1kv1TuYvTs0mT0YCTnIWj DUYxn0WfASr-VFAU7a7-sFnT9fnUUIcSsGvfJ3UbIYCTnIWIevJa73UjIFyTuYvj4RJUUU UUUUU Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,wangyuquan1236@phytium.com.cn List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: XOUW4jhs437Cogr89k1GaMa2x7686176AA= Content-Transfer-Encoding: 8bit X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=M0ng6EvK; dmarc=none; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io As sbsa-ref does not have DRAM below 4G, it cannot utilize EHCI that only has 32-bit DMA capablity and sbsa-ref board uses xhci to replace ehci. This updates DSDT to match the platform xhci controller with two usb ports changed from type A to type C. This also registers the non-discoverable XHCI for sbsa-ref. Signed-off-by: Yuquan Wang --- Silicon/Qemu/SbsaQemu/SbsaQemu.dec | 4 +- Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 6 +-- .../Qemu/SbsaQemu/AcpiTables/AcpiTables.inf | 4 +- .../SbsaQemuPlatformDxe.inf | 2 + .../SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c | 41 +++++++++++++++---- Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl | 15 +++---- 6 files changed, 49 insertions(+), 23 deletions(-) diff --git a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec b/Silicon/Qemu/SbsaQemu/SbsaQemu.dec index aab2894e6455..913d1d75ef29 100644 --- a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec +++ b/Silicon/Qemu/SbsaQemu/SbsaQemu.dec @@ -32,8 +32,8 @@ [PcdsFixedAtBuild.common] # Non discoverable devices Pcds gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformAhciBase|0|UINT64|0x00000001 gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformAhciSize|0x10000|UINT32|0x00000002 - gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformEhciBase|0|UINT64|0x00000003 - gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformEhciSize|0x10000|UINT32|0x00000004 + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformXhciBase|0|UINT64|0x00000003 + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformXhciSize|0x10000|UINT32|0x00000004 gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress|0x10000000000|UINT64|0x00000005 # PCDs complementing PCIe layout pulled into ACPI tables diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc index be406144c242..948e42326c33 100644 --- a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc +++ b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc @@ -429,11 +429,11 @@ [PcdsFixedAtBuild.common] # Initial Device Tree Location gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress|0x10000000000 - # Non discoverable devices (AHCI,EHCI) + # Non discoverable devices (AHCI,XHCI) gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformAhciBase|0x60100000 gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformAhciSize|0x00010000 - gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformEhciBase|0x60110000 - gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformEhciSize|0x00010000 + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformXhciBase|0x60110000 + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformXhciSize|0x00010000 # PL011 - Serial Terminal gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase|0x60000000 diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf b/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf index 97021f7971c7..abd10b6c3098 100644 --- a/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf +++ b/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf @@ -69,8 +69,8 @@ [FixedPcd] gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformAhciBase gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformAhciSize - gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformEhciBase - gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformEhciSize + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformXhciBase + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformXhciSize [Pcd] gArmTokenSpaceGuid.PcdGicDistributorBase diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf index 0e3b11d60426..19534b7a274a 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.inf @@ -37,6 +37,8 @@ [LibraryClasses] [Pcd] gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformAhciBase gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformAhciSize + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformXhciBase + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformXhciSize gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformVersionMajor gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformVersionMinor diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c index ddcca2b7243c..4a04dbeb07ae 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c @@ -26,8 +26,9 @@ InitializeSbsaQemuPlatformDxe ( ) { EFI_STATUS Status; - UINTN Size; - VOID* Base; + UINTN AhciSize, XhciSize; + VOID* AhciBase; + VOID* XhciBase; UINTN Arg0; UINTN Arg1; UINTN SmcResult; @@ -35,13 +36,13 @@ InitializeSbsaQemuPlatformDxe ( DEBUG ((DEBUG_INFO, "%a: InitializeSbsaQemuPlatformDxe called\n", __FUNCTION__)); - Base = (VOID*)(UINTN)PcdGet64 (PcdPlatformAhciBase); - ASSERT (Base != NULL); - Size = (UINTN)PcdGet32 (PcdPlatformAhciSize); - ASSERT (Size != 0); + AhciBase = (VOID*)(UINTN)PcdGet64 (PcdPlatformAhciBase); + ASSERT (AhciBase != NULL); + AhciSize = (UINTN)PcdGet32 (PcdPlatformAhciSize); + ASSERT (AhciSize != 0); DEBUG ((DEBUG_INFO, "%a: Got platform AHCI %llx %u\n", - __FUNCTION__, Base, Size)); + __FUNCTION__, AhciBase, AhciSize)); Status = RegisterNonDiscoverableMmioDevice ( NonDiscoverableDeviceTypeAhci, @@ -49,11 +50,33 @@ InitializeSbsaQemuPlatformDxe ( NULL, NULL, 1, - Base, Size); + AhciBase, AhciSize); if (EFI_ERROR(Status)) { DEBUG ((DEBUG_ERROR, "%a: NonDiscoverable: Cannot install AHCI device @%p (Staus == %r)\n", - __FUNCTION__, Base, Status)); + __FUNCTION__, AhciBase, Status)); + return Status; + } + + XhciBase = (VOID*)(UINTN)PcdGet64 (PcdPlatformXhciBase); + ASSERT (XhciBase != NULL); + XhciSize = (UINTN)PcdGet32 (PcdPlatformXhciSize); + ASSERT (XhciSize != 0); + + DEBUG ((DEBUG_INFO, "%a: Got platform XHCI %llx %u\n", + __FUNCTION__, XhciBase, XhciSize)); + + Status = RegisterNonDiscoverableMmioDevice ( + NonDiscoverableDeviceTypeXhci, + NonDiscoverableDeviceDmaTypeCoherent, + NULL, + NULL, + 1, + XhciBase, XhciSize); + + if (EFI_ERROR(Status)) { + DEBUG ((DEBUG_ERROR, "%a: NonDiscoverable: Cannot install XHCI device @%p (Staus == %r)\n", + __FUNCTION__, XhciBase, Status)); return Status; } diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl b/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl index e50772fcf76d..543b5782580a 100644 --- a/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl +++ b/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl @@ -68,18 +68,19 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", } } - // USB EHCI Host Controller + // USB XHCI Host Controller Device (USB0) { - Name (_HID, "LNRO0D20") - Name (_CID, "PNP0D20") + Name (_HID, "PNP0D10") // _HID: Hardware ID + Name (_UID, 0x00) // _UID: Unique ID + Name (_CCA, 0x01) // _CCA: Cache Coherency Attribute Method (_STA) { Return (0xF) } Method (_CRS, 0x0, Serialized) { Name (RBUF, ResourceTemplate() { Memory32Fixed (ReadWrite, - FixedPcdGet32 (PcdPlatformEhciBase), - FixedPcdGet32 (PcdPlatformEhciSize)) + FixedPcdGet32 (PcdPlatformXhciBase), + FixedPcdGet32 (PcdPlatformXhciSize)) Interrupt (ResourceConsumer, Level, ActiveHigh, Exclusive) { 43 } }) Return (RBUF) @@ -146,7 +147,7 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", Name (_ADR, 0x00000003) Name (_UPC, Package() { 0xFF, // Port is connectable - 0x00, // Port connector is A + 0x09, // Type C connector - USB2 and SS with Switch 0x00000000, 0x00000000 }) @@ -165,7 +166,7 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", Name (_ADR, 0x00000004) Name (_UPC, Package() { 0xFF, // Port is connectable - 0x00, // Port connector is A + 0x09, // Type C connector - USB2 and SS with Switch 0x00000000, 0x00000000 }) -- 2.34.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. 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