From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id 99057D80A20 for ; Tue, 26 Sep 2023 17:15:38 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=UUJGXkOV4BYiYyVA7MOWPdgAZKqctT+OkpyxkhsMHX8=; c=relaxed/simple; d=groups.io; h=From:To:CC:Subject:Date:Message-ID:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Transfer-Encoding:Content-Type; s=20140610; t=1695748537; v=1; b=XfNTq04juB6yUi5z/ZET9iFrlbKp54bFLAM+AyFWFHHO71akQzOv5rMmcIl76d2SGnzlP3GZ FGcPD2xA9GHdNpPuTfyOx6R0WUWKjn2I6B7B283Yy3Gz2aQAQkPtiWP6zFmQPHFBblhlcld04I7 Di3Q9sFT9e9BfJRvm+scehSE= X-Received: by 127.0.0.2 with SMTP id dQxpYY7687511xsgrbUbLbnq; Tue, 26 Sep 2023 10:15:37 -0700 X-Received: from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com [205.220.168.131]) by mx.groups.io with SMTP id smtpd.web11.25098.1695748536682119854 for ; Tue, 26 Sep 2023 10:15:36 -0700 X-Received: from pps.filterd (m0279866.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.19/8.17.1.19) with ESMTP id 38QD4kxx019547; Tue, 26 Sep 2023 17:15:33 GMT X-Received: from nasanppmta01.qualcomm.com (i-global254.qualcomm.com [199.106.103.254]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3tbw9bh6jq-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 26 Sep 2023 17:15:33 +0000 X-Received: from nasanex01c.na.qualcomm.com (nasanex01c.na.qualcomm.com [10.45.79.139]) by NASANPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 38QHFWhO002168 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Tue, 26 Sep 2023 17:15:32 GMT X-Received: from qc-i7.qualcomm.com (10.80.80.8) by nasanex01c.na.qualcomm.com (10.45.79.139) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.36; Tue, 26 Sep 2023 10:15:31 -0700 From: "Leif Lindholm" To: CC: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Ard Biesheuvel , Sami Mujawar , Andrei Warkentin Subject: [edk2-devel] [PATCH v2 0/5] MdePkg: various fixes to ARM/AArch64 SetJump/LongJump Date: Tue, 26 Sep 2023 18:15:18 +0100 Message-ID: <20230926171523.368706-1-quic_llindhol@quicinc.com> MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanex01a.na.qualcomm.com (10.52.223.231) To nasanex01c.na.qualcomm.com (10.45.79.139) X-QCInternal: smtphost X-Proofpoint-GUID: fZRerCDrKnCYNwBevQJoB1w6vdpqon6M X-Proofpoint-ORIG-GUID: fZRerCDrKnCYNwBevQJoB1w6vdpqon6M Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,quic_llindhol@quicinc.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: eVWkMishXYb4VHVvCvftjI0zx7686176AA= Content-Transfer-Encoding: 8bit Content-Type: text/plain X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=XfNTq04j; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=quicinc.com (policy=none) Back in the mists of time (January 2020) I submitted a set to clean up and fix a few bugs in ARM/AArch64 BaseLib SetJump/LongJump implementations: https://edk2.groups.io/g/devel/message/65812 Then hubris struck and I meant to refactor the code for all architectures, and since this was in my first week in a new job, that meant everything got completely dropped on the floor. Then Andrei's fix of similar issues for RiscV64 made me remember this set. And I figured, let's dial back the ambition and get the actual fixes merged. The overall scope remains: - Fix comments (drop Itanium mention, correct spelling) - Make code match existing comments - Don't try to optimise ARM for executing on the 8088 - Use the correct register sizes on AArch64 - Actually follow the API on ARM And like the original submission, the changes to .asm files have been neither build nor runtime tested. Any acks/reviewed-bys have been dropped, it having been over 3.5 years. Changes since v1: - Rebased to current edk2 main. - Incorporate Ard's feedback on maintaining a clean call stack for InternalAssertJumpBuffer, *and* conditionalising it on !MDEPKG_NDEBUG. - Changed authorship to my current identity (the company I worked at during v1 having been acquired by my current employer, this feels like a reasonable course of action). Cc: Ard Biesheuvel Cc: Sami Mujawar Cc: Andrei Warkentin Leif Lindholm (5): MdePkg/BaseLib: fix comments in ARM* SetJump/LongJump implementations MdePkg/BaseLib: add ASSERT in ARM* SetJump implementations MdePkg/BaseLib: use normal register init in ARM SetJump implementations MdePkg/BaseLib: correct register sizes in AArch64 SetJump/LongJump MdePkg/BaseLib: ensure ARM LongJump never returns 0 MdePkg/Library/BaseLib/AArch64/SetJumpLongJump.S | 19 +++++++++++++------ MdePkg/Library/BaseLib/AArch64/SetJumpLongJump.asm | 19 +++++++++++++------ MdePkg/Library/BaseLib/Arm/SetJumpLongJump.S | 7 ++++--- MdePkg/Library/BaseLib/Arm/SetJumpLongJump.asm | 7 ++++--- 4 files changed, 34 insertions(+), 18 deletions(-) -- 2.30.2 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. 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