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[76.20.53.72]) by smtp.gmail.com with ESMTPSA id s18-20020a17090330d200b001bb9f104328sm2073069plc.146.2023.10.03.14.00.26 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Oct 2023 14:00:27 -0700 (PDT) From: "Tuan Phan" To: devel@edk2.groups.io Cc: michael.d.kinney@intel.com, gaoliming@byosoft.com.cn, zhiguang.liu@intel.com, sunilvl@ventanamicro.com, git@danielschaefer.me, andrei.warkentin@intel.com, ardb+tianocore@kernel.org, Tuan Phan Subject: [edk2-devel] [PATCH] UefiCpuPkg: RISC-V: MMU: Introduce a PCD for SATP mode Date: Tue, 3 Oct 2023 14:00:21 -0700 Message-Id: <20231003210021.26834-1-tphan@ventanamicro.com> MIME-Version: 1.0 Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,tphan@ventanamicro.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: Content-Transfer-Encoding: quoted-printable X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=F99nutoo; dmarc=none; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io Introduce a PCD to control the maximum SATP mode that MMU allowed to use. This PCD helps RISC-V platform set bare or minimum SATA mode during bring up to debug memory map issue. Signed-off-by: Tuan Phan --- UefiCpuPkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.c | 6 +++++- UefiCpuPkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.inf | 3 +++ UefiCpuPkg/UefiCpuPkg.dec | 8 ++++++++ 3 files changed, 16 insertions(+), 1 deletion(-) diff --git a/UefiCpuPkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.c b/UefiCpu= Pkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.c index 9cca5fc128af..826a1d32a1d4 100644 --- a/UefiCpuPkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.c +++ b/UefiCpuPkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.c @@ -36,7 +36,7 @@ #define PTE_PPN_SHIFT 10=0D #define RISCV_MMU_PAGE_SHIFT 12=0D =0D -STATIC UINTN mModeSupport[] =3D { SATP_MODE_SV57, SATP_MODE_SV48, SATP_MO= DE_SV39 };=0D +STATIC UINTN mModeSupport[] =3D { SATP_MODE_SV57, SATP_MODE_SV48, SATP_MO= DE_SV39, SATP_MODE_OFF };=0D STATIC UINTN mMaxRootTableLevel;=0D STATIC UINTN mBitPerLevel;=0D STATIC UINTN mTableEntryCount;=0D @@ -590,6 +590,10 @@ RiscVMmuSetSatpMode ( UINTN Index;=0D EFI_STATUS Status;=0D =0D + if (SatpMode > PcdGet32 (PcdCpuRiscVMmuMaxSatpMode)) {=0D + return EFI_DEVICE_ERROR;=0D + }=0D +=0D switch (SatpMode) {=0D case SATP_MODE_OFF:=0D return EFI_SUCCESS;=0D diff --git a/UefiCpuPkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.inf b/UefiC= puPkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.inf index 9b28a98cb346..51ebe1750e97 100644 --- a/UefiCpuPkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.inf +++ b/UefiCpuPkg/Library/BaseRiscVMmuLib/BaseRiscVMmuLib.inf @@ -25,3 +25,6 @@ =0D [LibraryClasses]=0D BaseLib=0D +=0D +[Pcd]=0D + gUefiCpuPkgTokenSpaceGuid.PcdCpuRiscVMmuMaxSatpMode ## CONSUMES=0D diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec index 68473fc640e6..79191af18a05 100644 --- a/UefiCpuPkg/UefiCpuPkg.dec +++ b/UefiCpuPkg/UefiCpuPkg.dec @@ -396,6 +396,14 @@ # @Prompt Access to non-SMRAM memory is restricted to reserved, runtime = and ACPI NVS type after SmmReadyToLock.=0D gUefiCpuPkgTokenSpaceGuid.PcdCpuSmmRestrictedMemoryAccess|TRUE|BOOLEAN|0= x3213210F=0D =0D +[PcdsFixedAtBuild.RISCV64]=0D + ## Indicate the maximum SATP mode allowed.=0D + # 0 - Bare mode.=0D + # 8 - 39bit mode.=0D + # 9 - 48bit mode.=0D + # 10 - 57bit mode.=0D + gUefiCpuPkgTokenSpaceGuid.PcdCpuRiscVMmuMaxSatpMode|0|UINT32|0x60000021= =0D +=0D [PcdsDynamic, PcdsDynamicEx]=0D ## Contains the pointer to a CPU S3 data buffer of structure ACPI_CPU_DA= TA.=0D # @Prompt The pointer to a CPU S3 data buffer.=0D --=20 2.25.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. 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