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smtpd.web10.115206.1698045518331077790 for ; Mon, 23 Oct 2023 00:18:39 -0700 X-Received: from EXMBX165.cuchost.com (unknown [175.102.18.54]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client CN "EXMBX165", Issuer "EXMBX165" (not verified)) by ex01.ufhost.com (Postfix) with ESMTP id 5480B24E36F; Mon, 23 Oct 2023 15:18:36 +0800 (CST) X-Received: from EXMBX073.cuchost.com (172.16.6.83) by EXMBX165.cuchost.com (172.16.6.75) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Mon, 23 Oct 2023 15:18:35 +0800 X-Received: from localhost.localdomain (202.188.176.82) by EXMBX073.cuchost.com (172.16.6.83) with Microsoft SMTP Server (TLS) id 15.0.1497.42; Mon, 23 Oct 2023 15:18:31 +0800 From: "John Chew" To: CC: mindachen1987 , Sunil V L , Leif Lindholm , Michael D Kinney , "Cc : Li Yong" , John Chew Subject: [edk2-devel] [PATCH v2 4/5] DesignWare/DwEmmcDxe: Add handling for SDMMC Date: Mon, 23 Oct 2023 15:17:14 +0800 Message-ID: <20231023071715.777-5-yuinyee.chew@starfivetech.com> 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From: mindachen1987 Add base address PCD for eMMC and SDMMC Add application command for SDMMC Add PCD for Ultra High Speed (UHS) option Cc: Sunil V L Cc: Leif Lindholm Cc: Michael D Kinney Cc: Cc: Li Yong Co-authored-by: John Chew Signed-off-by: mindachen1987 --- Silicon/Synopsys/DesignWare/DesignWare.dec = | 2 + Silicon/Synopsys/DesignWare/DesignWare.dsc = | 1 + Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmc.h = | 64 +++---- Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.c = | 183 +++++++++++++------- Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.inf = | 1 + Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/{DwEmmcDxe.inf =3D> DwSdmmcD= xe.inf} | 9 +- 6 files changed, 158 insertions(+), 102 deletions(-) diff --git a/Silicon/Synopsys/DesignWare/DesignWare.dec b/Silicon/Synopsys/= DesignWare/DesignWare.dec index 751370a8b1af..91aca7568b08 100755 --- a/Silicon/Synopsys/DesignWare/DesignWare.dec +++ b/Silicon/Synopsys/DesignWare/DesignWare.dec @@ -31,4 +31,6 @@ [PcdsFixedAtBuild.common] gDesignWareTokenSpaceGuid.PcdDwEmmcDxeClockFrequencyInHz|0x0|UINT32|0x00= 000003 gDesignWareTokenSpaceGuid.PcdDwEmmcDxeMaxClockFreqInHz|0x0|UINT32|0x0000= 0004 gDesignWareTokenSpaceGuid.PcdDwEmmcDxeFifoDepth|0x0|UINT32|0x00000005 + gDesignWareTokenSpaceGuid.PcdDwSdDxeBaseAddress|0x0|UINT32|0x00000006 + gDesignWareTokenSpaceGuid.PcdDwEmmcDxeUHSEn|TRUE|BOOLEAN|0x00000007 gDesignWareTokenSpaceGuid.PcdDwEmmcDxeCPULittleEndian|FALSE|BOOLEAN|0x00= 000008 diff --git a/Silicon/Synopsys/DesignWare/DesignWare.dsc b/Silicon/Synopsys/= DesignWare/DesignWare.dsc index b5a7b38e142e..7ebec358851e 100755 --- a/Silicon/Synopsys/DesignWare/DesignWare.dsc +++ b/Silicon/Synopsys/DesignWare/DesignWare.dsc @@ -43,3 +43,4 @@ [LibraryClasses] [Components] Silicon/Synopsys/DesignWare/Drivers/DwEmacSnpDxe/DwEmacSnpDxe.inf Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.inf + Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwSdmmcDxe.inf diff --git a/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmc.h b/Silic= on/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmc.h index 3347418006c7..5d2e6d4055a4 100644 --- a/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmc.h +++ b/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmc.h @@ -18,38 +18,38 @@ #include =20 // DW MMC Registers -#define DWEMMC_CTRL ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress= ) + 0x000) -#define DWEMMC_PWREN ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress= ) + 0x004) -#define DWEMMC_CLKDIV ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress= ) + 0x008) -#define DWEMMC_CLKSRC ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress= ) + 0x00c) -#define DWEMMC_CLKENA ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress= ) + 0x010) -#define DWEMMC_TMOUT ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress= ) + 0x014) -#define DWEMMC_CTYPE ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress= ) + 0x018) -#define DWEMMC_BLKSIZ ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress= ) + 0x01c) -#define DWEMMC_BYTCNT ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress= ) + 0x020) -#define DWEMMC_INTMASK ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress= ) + 0x024) -#define DWEMMC_CMDARG ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress= ) + 0x028) -#define DWEMMC_CMD ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress= ) + 0x02c) -#define DWEMMC_RESP0 ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress= ) + 0x030) -#define DWEMMC_RESP1 ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress= ) + 0x034) -#define DWEMMC_RESP2 ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress= ) + 0x038) -#define DWEMMC_RESP3 ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress= ) + 0x03c) -#define DWEMMC_RINTSTS ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress= ) + 0x044) -#define DWEMMC_STATUS ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress= ) + 0x048) -#define DWEMMC_FIFOTH ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress= ) + 0x04c) -#define DWEMMC_TCBCNT ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress= ) + 0x05c) -#define DWEMMC_TBBCNT ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress= ) + 0x060) -#define DWEMMC_DEBNCE ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress= ) + 0x064) -#define DWEMMC_HCON ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress= ) + 0x070) -#define DWEMMC_UHSREG ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress= ) + 0x074) -#define DWEMMC_BMOD ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress= ) + 0x080) -#define DWEMMC_DBADDR ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress= ) + 0x088) -#define DWEMMC_IDSTS ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress= ) + 0x08c) -#define DWEMMC_IDINTEN ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress= ) + 0x090) -#define DWEMMC_DSCADDR ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress= ) + 0x094) -#define DWEMMC_BUFADDR ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress= ) + 0x098) -#define DWEMMC_CARDTHRCTL ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress= ) + 0X100) -#define DWEMMC_DATA ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress= ) + 0X200) +#define DWEMMC_CTRL ((PcdDwDxeBaseAddress) + 0x000) +#define DWEMMC_PWREN ((PcdDwDxeBaseAddress) + 0x004) +#define DWEMMC_CLKDIV ((PcdDwDxeBaseAddress) + 0x008) +#define DWEMMC_CLKSRC ((PcdDwDxeBaseAddress) + 0x00c) +#define DWEMMC_CLKENA ((PcdDwDxeBaseAddress) + 0x010) +#define DWEMMC_TMOUT ((PcdDwDxeBaseAddress) + 0x014) +#define DWEMMC_CTYPE ((PcdDwDxeBaseAddress) + 0x018) +#define DWEMMC_BLKSIZ ((PcdDwDxeBaseAddress) + 0x01c) +#define DWEMMC_BYTCNT ((PcdDwDxeBaseAddress) + 0x020) +#define DWEMMC_INTMASK ((PcdDwDxeBaseAddress) + 0x024) +#define DWEMMC_CMDARG ((PcdDwDxeBaseAddress) + 0x028) +#define DWEMMC_CMD ((PcdDwDxeBaseAddress) + 0x02c) +#define DWEMMC_RESP0 ((PcdDwDxeBaseAddress) + 0x030) +#define DWEMMC_RESP1 ((PcdDwDxeBaseAddress) + 0x034) +#define DWEMMC_RESP2 ((PcdDwDxeBaseAddress) + 0x038) +#define DWEMMC_RESP3 ((PcdDwDxeBaseAddress) + 0x03c) +#define DWEMMC_RINTSTS ((PcdDwDxeBaseAddress) + 0x044) +#define DWEMMC_STATUS ((PcdDwDxeBaseAddress) + 0x048) +#define DWEMMC_FIFOTH ((PcdDwDxeBaseAddress) + 0x04c) +#define DWEMMC_TCBCNT ((PcdDwDxeBaseAddress) + 0x05c) +#define DWEMMC_TBBCNT ((PcdDwDxeBaseAddress) + 0x060) +#define DWEMMC_DEBNCE ((PcdDwDxeBaseAddress) + 0x064) +#define DWEMMC_HCON ((PcdDwDxeBaseAddress) + 0x070) +#define DWEMMC_UHSREG ((PcdDwDxeBaseAddress) + 0x074) +#define DWEMMC_BMOD ((PcdDwDxeBaseAddress) + 0x080) +#define DWEMMC_DBADDR ((PcdDwDxeBaseAddress) + 0x088) +#define DWEMMC_IDSTS ((PcdDwDxeBaseAddress) + 0x08c) +#define DWEMMC_IDINTEN ((PcdDwDxeBaseAddress) + 0x090) +#define DWEMMC_DSCADDR ((PcdDwDxeBaseAddress) + 0x094) +#define DWEMMC_BUFADDR ((PcdDwDxeBaseAddress) + 0x098) +#define DWEMMC_CARDTHRCTL ((PcdDwDxeBaseAddress) + 0X100) +#define DWEMMC_DATA ((PcdDwDxeBaseAddress) + 0X200) =20 #define CMD_UPDATE_CLK 0x80202000 #define CMD_START_BIT (1 << 31) diff --git a/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.c b/Si= licon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.c index edda28a45d7c..39e4d994fcd4 100644 --- a/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.c +++ b/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.c @@ -25,12 +25,18 @@ =20 #include =20 +#ifdef CONFIG_DWEMMC +#define PcdDwDxeBaseAddress ((UINT32)PcdGet32 (PcdDwEmmcDxeBaseAddress)) +#elif CONFIG_DWSDMMC +#define PcdDwDxeBaseAddress ((UINT32)PcdGet32 (PcdDwSdDxeBaseAddress)) +#endif #include "DwEmmc.h" =20 -#define DWEMMC_DESC_PAGE 1 -#define DWEMMC_BLOCK_SIZE 512 -#define DWEMMC_DMA_BUF_SIZE (512 * 8) -#define DWEMMC_MAX_DESC_PAGES 512 +#define DWEMMC_DESC_PAGE 1 +#define DWEMMC_BLOCK_SIZE 512 +#define DWEMMC_DMA_BUF_SIZE (512 * 8) +#define DWEMMC_MAX_DESC_PAGES 512 +#define DWMCI_SD_READ_MASK(X) ((0xFFFFF0&X) =3D=3D 0xFFFFF0) =20 typedef struct { UINT32 Des0; @@ -44,6 +50,7 @@ DWEMMC_IDMAC_DESCRIPTOR *gpIdmacDesc; EFI_GUID mDwEmmcDevicePathGuid =3D EFI_CALLER_ID_GUID; STATIC UINT32 mDwEmmcCommand; STATIC UINT32 mDwEmmcArgument; +STATIC UINT32 LastExecutedCommand =3D (UINT32) -1; =20 EFI_STATUS DwEmmcReadBlockData ( @@ -204,6 +211,7 @@ DwEmmcNotifyState ( ASSERT (!EFI_ERROR (Status)); // Wait clock stable MicroSecondDelay (100); + MmioWrite32 (DWEMMC_CTYPE, 0); =20 MmioWrite32 (DWEMMC_RINTSTS, ~0); MmioWrite32 (DWEMMC_INTMASK, 0); @@ -314,68 +322,106 @@ DwEmmcSendCommand ( UINT32 Cmd =3D 0; EFI_STATUS Status =3D EFI_SUCCESS; =20 - switch (MMC_GET_INDX(MmcCmd)) { - case MMC_INDX(0): - Cmd =3D BIT_CMD_SEND_INIT; - break; - case MMC_INDX(1): - Cmd =3D BIT_CMD_RESPONSE_EXPECT; - break; - case MMC_INDX(2): - Cmd =3D BIT_CMD_RESPONSE_EXPECT | BIT_CMD_LONG_RESPONSE | - BIT_CMD_CHECK_RESPONSE_CRC | BIT_CMD_SEND_INIT; - break; - case MMC_INDX(3): - Cmd =3D BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | - BIT_CMD_SEND_INIT; - break; - case MMC_INDX(7): - if (Argument) + if (LastExecutedCommand =3D=3D MMC_INDX(55)) { + switch (MMC_GET_INDX(MmcCmd)) { + case MMC_INDX(1): + Cmd =3D BIT_CMD_RESPONSE_EXPECT; + break; + // Application command + case MMC_INDX(6): + Cmd =3D BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC; + break; + case MMC_INDX(41): + Cmd =3D BIT_CMD_RESPONSE_EXPECT; + break; + case MMC_INDX(51): + Cmd =3D BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | + BIT_CMD_DATA_EXPECTED | BIT_CMD_READ | + BIT_CMD_WAIT_PRVDATA_COMPLETE; + break; + default: + DEBUG ((DEBUG_ERROR, "%a: Unrecognized App command: %d\n", __func__,= MMC_GET_INDX(MmcCmd))); + break; + } + } else { + switch (MMC_GET_INDX(MmcCmd)) { + case MMC_INDX(0): + Cmd =3D BIT_CMD_SEND_INIT; + break; + case MMC_INDX(1): + Cmd =3D BIT_CMD_RESPONSE_EXPECT; + break; + case MMC_INDX(2): + Cmd =3D BIT_CMD_RESPONSE_EXPECT | BIT_CMD_LONG_RESPONSE | + BIT_CMD_CHECK_RESPONSE_CRC | BIT_CMD_SEND_INIT; + break; + case MMC_INDX(3): + Cmd =3D BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | + BIT_CMD_SEND_INIT; + break; + case MMC_INDX(7): + if (Argument) { + Cmd =3D BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC; + } else { + Cmd =3D 0; + } + break; + case MMC_INDX(8): + if (Argument) { + Cmd =3D BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | + BIT_CMD_WAIT_PRVDATA_COMPLETE; + } else { + Cmd =3D BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | + BIT_CMD_DATA_EXPECTED | BIT_CMD_READ | + BIT_CMD_WAIT_PRVDATA_COMPLETE; + } + break; + case MMC_INDX(9): + Cmd =3D BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | + BIT_CMD_LONG_RESPONSE; + break; + case MMC_INDX(12): + Cmd =3D BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | + BIT_CMD_STOP_ABORT_CMD; + break; + case MMC_INDX(13): + Cmd =3D BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | + BIT_CMD_WAIT_PRVDATA_COMPLETE; + break; + case MMC_INDX(16): + Cmd =3D BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | + /* BIT_CMD_DATA_EXPECTED | BIT_CMD_READ | */ + BIT_CMD_WAIT_PRVDATA_COMPLETE; + break; + case MMC_INDX(6): + if DWMCI_SD_READ_MASK(Argument) { + Cmd =3D BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | + BIT_CMD_DATA_EXPECTED | BIT_CMD_READ | + BIT_CMD_WAIT_PRVDATA_COMPLETE; + } else { Cmd =3D BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC; - else - Cmd =3D 0; - break; - case MMC_INDX(8): - Cmd =3D BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | - BIT_CMD_DATA_EXPECTED | BIT_CMD_READ | - BIT_CMD_WAIT_PRVDATA_COMPLETE; - break; - case MMC_INDX(9): - Cmd =3D BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | - BIT_CMD_LONG_RESPONSE; - break; - case MMC_INDX(12): - Cmd =3D BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | - BIT_CMD_STOP_ABORT_CMD; - break; - case MMC_INDX(13): - Cmd =3D BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | - BIT_CMD_WAIT_PRVDATA_COMPLETE; - break; - case MMC_INDX(16): - Cmd =3D BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | - BIT_CMD_DATA_EXPECTED | BIT_CMD_READ | - BIT_CMD_WAIT_PRVDATA_COMPLETE; - break; - case MMC_INDX(17): - case MMC_INDX(18): - Cmd =3D BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | - BIT_CMD_DATA_EXPECTED | BIT_CMD_READ | - BIT_CMD_WAIT_PRVDATA_COMPLETE; - break; - case MMC_INDX(24): - case MMC_INDX(25): - Cmd =3D BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | - BIT_CMD_DATA_EXPECTED | BIT_CMD_WRITE | - BIT_CMD_WAIT_PRVDATA_COMPLETE; - break; - case MMC_INDX(30): - Cmd =3D BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | - BIT_CMD_DATA_EXPECTED; - break; - default: - Cmd =3D BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC; - break; + } + break; + case MMC_INDX(17): + case MMC_INDX(18): + Cmd =3D BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | + BIT_CMD_DATA_EXPECTED | BIT_CMD_READ | + BIT_CMD_WAIT_PRVDATA_COMPLETE; + break; + case MMC_INDX(24): + case MMC_INDX(25): + Cmd =3D BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | + BIT_CMD_DATA_EXPECTED | BIT_CMD_WRITE | + BIT_CMD_WAIT_PRVDATA_COMPLETE; + break; + case MMC_INDX(30): + Cmd =3D BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC | + BIT_CMD_DATA_EXPECTED; + break; + default: + Cmd =3D BIT_CMD_RESPONSE_EXPECT | BIT_CMD_CHECK_RESPONSE_CRC; + break; + } } =20 Cmd |=3D MMC_GET_INDX(MmcCmd) | BIT_CMD_USE_HOLD_REG | BIT_CMD_START; @@ -385,6 +431,9 @@ DwEmmcSendCommand ( } else { Status =3D SendCommand (Cmd, Argument); } + + LastExecutedCommand =3D MMC_GET_INDX(MmcCmd); + return Status; } =20 @@ -475,7 +524,6 @@ PrepareDmaData ( =20 Cnt =3D (Length + DWEMMC_DMA_BUF_SIZE - 1) / DWEMMC_DMA_BUF_SIZE; Blks =3D (Length + DWEMMC_BLOCK_SIZE - 1) / DWEMMC_BLOCK_SIZE; - Length =3D DWEMMC_BLOCK_SIZE * Blks; =20 for (Idx =3D 0; Idx < Cnt; Idx++) { (IdmacDesc + Idx)->Des0 =3D DWEMMC_IDMAC_DES0_OWN | DWEMMC_IDMAC_DES0_= CH | @@ -660,6 +708,9 @@ DwEmmcSetIos ( switch (TimingMode) { case EMMCHS52DDR1V2: case EMMCHS52DDR1V8: + if (!FixedPcdGetBool (PcdDwEmmcDxeUHSEn)) { + return EFI_UNSUPPORTED; + } Data |=3D 1 << 16; break; case EMMCHS52: diff --git a/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.inf b/= Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.inf index 0bd78d5a05ad..4e8dd7bcd7dc 100644 --- a/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.inf +++ b/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.inf @@ -51,6 +51,7 @@ [Pcd] gDesignWareTokenSpaceGuid.PcdDwEmmcDxeFifoDepth gDesignWareTokenSpaceGuid.PcdDwPermitObsoleteDrivers gDesignWareTokenSpaceGuid.PcdDwEmmcDxeCPULittleEndian + gDesignWareTokenSpaceGuid.PcdDwEmmcDxeUHSEn =20 [Depex] TRUE diff --git a/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.inf b/= Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwSdmmcDxe.inf similarity index 77% copy from Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.inf copy to Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwSdmmcDxe.inf index 0bd78d5a05ad..efbf3bff56bd 100644 --- a/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwEmmcDxe.inf +++ b/Silicon/Synopsys/DesignWare/Drivers/DwEmmcDxe/DwSdmmcDxe.inf @@ -1,5 +1,5 @@ #/** @file -# INF file for the eMMC Host Protocol implementation for the DesignWare M= MC. +# INF file for the SdMMC Host Protocol implementation for the DesignWare = MMC. # # WARNING: # This driver fails to follow the UEFI driver model without a good @@ -14,8 +14,8 @@ =20 [Defines] INF_VERSION =3D 0x00010019 - BASE_NAME =3D DwEmmcDxe - FILE_GUID =3D b549f005-4bd4-4020-a0cb-06f42bda68c3 + BASE_NAME =3D DwSdmmcDxe + FILE_GUID =3D b549f005-4bd4-4020-a0cb-06f5478a68c3 MODULE_TYPE =3D DXE_DRIVER VERSION_STRING =3D 1.0 =20 @@ -45,11 +45,12 @@ [Protocols] gEmbeddedMmcHostProtocolGuid =20 [Pcd] - gDesignWareTokenSpaceGuid.PcdDwEmmcDxeBaseAddress + gDesignWareTokenSpaceGuid.PcdDwSdDxeBaseAddress gDesignWareTokenSpaceGuid.PcdDwEmmcDxeClockFrequencyInHz gDesignWareTokenSpaceGuid.PcdDwEmmcDxeMaxClockFreqInHz gDesignWareTokenSpaceGuid.PcdDwEmmcDxeFifoDepth gDesignWareTokenSpaceGuid.PcdDwPermitObsoleteDrivers + gDesignWareTokenSpaceGuid.PcdDwEmmcDxeUHSEn gDesignWareTokenSpaceGuid.PcdDwEmmcDxeCPULittleEndian =20 [Depex] --=20 2.34.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#109894): https://edk2.groups.io/g/devel/message/109894 Mute This Topic: https://groups.io/mt/102130689/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-