From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id CBA83AC0E90 for ; Thu, 2 Nov 2023 13:52:42 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=R7jwuyHh78prw38QtkObG9IhvXtrqI0oKEHAr4FTwFo=; c=relaxed/simple; d=groups.io; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Transfer-Encoding; s=20140610; t=1698933161; v=1; b=bZ8e1bO2rnMRNdWaAnX2fYBrcakAUeWKt6RwNoHXRRVXsKJHGuRiacRurKUT+iWh1e9CSWs0 /HnhJM7rViCm1SuXn/3INvzszLnUEhJMnKtbzE2WrvVPxsAROjyRkg5chO6cKwtRe32uKmScKVq NmPYw71syIyzfBW9LNyxP26A= X-Received: by 127.0.0.2 with SMTP id qaESYY7687511xbrl1CEyIvM; Thu, 02 Nov 2023 06:52:41 -0700 X-Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by mx.groups.io with SMTP id smtpd.web11.31366.1698933140211549009 for ; Thu, 02 Nov 2023 06:52:41 -0700 X-Received: from loongson.cn (unknown [10.2.9.245]) by gateway (Coremail) with SMTP id _____8DxBfF0p0Nlj4A2AA--.41600S3; Thu, 02 Nov 2023 21:43:16 +0800 (CST) X-Received: from code-server.gen (unknown [10.2.9.245]) by localhost.localdomain (Coremail) with SMTP id AQAAf8Cx7y9fp0Nl0Zg4AA--.56656S4; Thu, 02 Nov 2023 21:43:15 +0800 (CST) From: "Chao Li" To: devel@edk2.groups.io Cc: Michael D Kinney , Liming Gao , Zhiguang Liu Subject: [edk2-devel] [PATCH v1 02/29] MdePkg: Add LoongArch64 FPU function set into BaseCpuLib Date: Thu, 2 Nov 2023 21:42:22 +0800 Message-Id: <20231102134249.3983594-3-lichao@loongson.cn> In-Reply-To: <20231102134249.3983594-1-lichao@loongson.cn> References: <20231102134249.3983594-1-lichao@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: AQAAf8Cx7y9fp0Nl0Zg4AA--.56656S4 X-CM-SenderInfo: xolfxt3r6o00pqjv00gofq/1tbiAQADCGVDP+bQRQAFsl X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,lichao@loongson.cn List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: bM778Kl2rS8ZoLiiV4NewPBnx7686176AA= Content-Transfer-Encoding: 8bit X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=bZ8e1bO2; dmarc=none; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io Adding InitializeFloatingPointUnits, EnableFloatingPointUnits and DisableFloatingPointUnits functions for LoongArch64. BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584 Cc: Michael D Kinney Cc: Liming Gao Cc: Zhiguang Liu Signed-off-by: Chao Li --- MdePkg/Include/Library/CpuLib.h | 37 +++++++++++--- MdePkg/Library/BaseCpuLib/BaseCpuLib.inf | 7 ++- .../Library/BaseCpuLib/LoongArch/DisableFpu.S | 17 +++++++ .../Library/BaseCpuLib/LoongArch/EnableFpu.S | 17 +++++++ .../BaseCpuLib/LoongArch/InitializeFpu.S | 51 +++++++++++++++++++ 5 files changed, 121 insertions(+), 8 deletions(-) create mode 100644 MdePkg/Library/BaseCpuLib/LoongArch/DisableFpu.S create mode 100644 MdePkg/Library/BaseCpuLib/LoongArch/EnableFpu.S create mode 100644 MdePkg/Library/BaseCpuLib/LoongArch/InitializeFpu.S diff --git a/MdePkg/Include/Library/CpuLib.h b/MdePkg/Include/Library/CpuLib.h index 3f29937dc7..42da55ca69 100644 --- a/MdePkg/Include/Library/CpuLib.h +++ b/MdePkg/Include/Library/CpuLib.h @@ -8,6 +8,7 @@ As a result, these services could not be defined in the Base Library. Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.
+Copyright (c) 2023, Loongson Technology Corporation Limited. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent **/ @@ -41,14 +42,14 @@ CpuFlushTlb ( VOID ); -#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64) - /** + Initialize the CPU floating point units. + Initializes floating point units for requirement of UEFI specification. - This function initializes floating-point control word to 0x027F (all exceptions - masked,double-precision, round-to-nearest) and multimedia-extensions control word - (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero - for masked underflow). + For IA32 and X64, this function initializes floating-point control word to 0x027F + (all exceptions masked,double-precision, round-to-nearest) and multimedia-extensions + control word (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, + flush to zero for masked underflow). **/ VOID EFIAPI @@ -56,6 +57,30 @@ InitializeFloatingPointUnits ( VOID ); +/** + Enable the CPU floating point units. + + Enable the CPU floating point units. +**/ +VOID +EFIAPI +EnableFloatingPointUnits ( + VOID + ); + +/** + Disable the CPU floating point units. + + Disable the CPU floating point units. +**/ +VOID +EFIAPI +DisableFloatingPointUnits ( + VOID + ); + +#if defined (MDE_CPU_IA32) || defined (MDE_CPU_X64) + /** Determine if the standard CPU signature is "AuthenticAMD". @retval TRUE The CPU signature matches. diff --git a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf index 9a162afe6d..89f6272f11 100644 --- a/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf +++ b/MdePkg/Library/BaseCpuLib/BaseCpuLib.inf @@ -65,8 +65,11 @@ RiscV/Cpu.S [Sources.LOONGARCH64] - LoongArch/CpuFlushTlb.S | GCC - LoongArch/CpuSleep.S | GCC + LoongArch/CpuFlushTlb.S | GCC + LoongArch/CpuSleep.S | GCC + LoongArch/InitializeFpu.S | GCC + LoongArch/EnableFpu.S | GCC + LoongArch/DisableFpu.S | GCC [Packages] MdePkg/MdePkg.dec diff --git a/MdePkg/Library/BaseCpuLib/LoongArch/DisableFpu.S b/MdePkg/Library/BaseCpuLib/LoongArch/DisableFpu.S new file mode 100644 index 0000000000..6cb253a416 --- /dev/null +++ b/MdePkg/Library/BaseCpuLib/LoongArch/DisableFpu.S @@ -0,0 +1,17 @@ +#------------------------------------------------------------------------------ +# +# DisableFloatingPointUnits() for LoongArch64 +# +# Copyright (c) 2023, Loongson Technology Corporation Limited. All rights reserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +#------------------------------------------------------------------------------ +ASM_GLOBAL ASM_PFX(DisableFloatingPointUnits) + +ASM_PFX(DisableFloatingPointUnits): + li.w $t0, 0x1 + csrxchg $zero, $t0, 0x2 + + jirl $zero, $ra, 0 + .end diff --git a/MdePkg/Library/BaseCpuLib/LoongArch/EnableFpu.S b/MdePkg/Library/BaseCpuLib/LoongArch/EnableFpu.S new file mode 100644 index 0000000000..27d8243a59 --- /dev/null +++ b/MdePkg/Library/BaseCpuLib/LoongArch/EnableFpu.S @@ -0,0 +1,17 @@ +#------------------------------------------------------------------------------ +# +# EnableFloatingPointUnits() for LoongArch64 +# +# Copyright (c) 2023, Loongson Technology Corporation Limited. All rights reserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +#------------------------------------------------------------------------------ +ASM_GLOBAL ASM_PFX(EnableFloatingPointUnits) + +ASM_PFX(EnableFloatingPointUnits): + li.w $t0, 0x1 + csrxchg $t0, $t0, 0x2 + + jirl $zero, $ra, 0 + .end diff --git a/MdePkg/Library/BaseCpuLib/LoongArch/InitializeFpu.S b/MdePkg/Library/BaseCpuLib/LoongArch/InitializeFpu.S new file mode 100644 index 0000000000..1b9d01c2c1 --- /dev/null +++ b/MdePkg/Library/BaseCpuLib/LoongArch/InitializeFpu.S @@ -0,0 +1,51 @@ +#------------------------------------------------------------------------------ +# +# InitializeFloatingPointUnits() for LoongArch64 +# +# Copyright (c) 2023, Loongson Technology Corporation Limited. All rights reserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +#------------------------------------------------------------------------------ +ASM_GLOBAL ASM_PFX(InitializeFloatingPointUnits) + +ASM_PFX(InitializeFloatingPointUnits): + li.d $t0, 0x0 // RNE mode + movgr2fcsr $r0, $t0 + li.d $t1, -1 // SNaN + + movgr2fr.d $f0, $t1 + movgr2fr.d $f1, $t1 + movgr2fr.d $f2, $t1 + movgr2fr.d $f3, $t1 + movgr2fr.d $f4, $t1 + movgr2fr.d $f5, $t1 + movgr2fr.d $f6, $t1 + movgr2fr.d $f7, $t1 + movgr2fr.d $f8, $t1 + movgr2fr.d $f9, $t1 + movgr2fr.d $f10, $t1 + movgr2fr.d $f11, $t1 + movgr2fr.d $f12, $t1 + movgr2fr.d $f13, $t1 + movgr2fr.d $f14, $t1 + movgr2fr.d $f15, $t1 + movgr2fr.d $f16, $t1 + movgr2fr.d $f17, $t1 + movgr2fr.d $f18, $t1 + movgr2fr.d $f19, $t1 + movgr2fr.d $f20, $t1 + movgr2fr.d $f21, $t1 + movgr2fr.d $f22, $t1 + movgr2fr.d $f23, $t1 + movgr2fr.d $f24, $t1 + movgr2fr.d $f25, $t1 + movgr2fr.d $f26, $t1 + movgr2fr.d $f27, $t1 + movgr2fr.d $f28, $t1 + movgr2fr.d $f29, $t1 + movgr2fr.d $f30, $t1 + movgr2fr.d $f31, $t1 + + jirl $zero, $ra, 0 + .end -- 2.27.0 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#110546): https://edk2.groups.io/g/devel/message/110546 Mute This Topic: https://groups.io/mt/102342356/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=-=-=-=-=-=-=-=-=-=-=-