From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id 5A8A194146E for ; Thu, 2 Nov 2023 13:54:40 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=Z/x+NcH2+ghKDnIX7QcC5HuBNPCfeXq2RhASrCCawsI=; c=relaxed/simple; d=groups.io; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Transfer-Encoding; s=20140610; t=1698933279; v=1; b=KjvN+14djC47a91udCybPuiizbjX7i0IiWvemmBnFktZyzYV00MzKEhZeNMj7cANx1Vz7NoJ zOE1ccSkRSMEgV3invK1GxjMNKMHYQEkxcDgeyJfqaCU1V5ZxQaJL56eDu4zaxAFpZ4t8qbu5pM XZwrEpBTwuP4IcR2Sz5sx1mc= X-Received: by 127.0.0.2 with SMTP id sGDyYY7687511xAZ2GKmXMmi; Thu, 02 Nov 2023 06:54:39 -0700 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web10.31756.1698933278427573181 for ; Thu, 02 Nov 2023 06:54:38 -0700 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 6561C1516; Thu, 2 Nov 2023 06:55:20 -0700 (PDT) X-Received: from cam-smtp0.cambridge.arm.com (e126645.nice.arm.com [10.34.100.114]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id C7C483F738; Thu, 2 Nov 2023 06:54:36 -0700 (PDT) From: "PierreGondois" To: devel@edk2.groups.io Cc: Jiewen Yao , Yi Li , Xiaoyu Lu , Guomin Jiang , Leif Lindholm , Ard Biesheuvel , Sami Mujawar , Gerd Hoffmann Subject: [edk2-devel] [PATCH v1 3/7] MdePkg/BaseRngLib: Prefer ArmReadIdAA64Isar0Reg() over ArmReadIdIsar0() Date: Thu, 2 Nov 2023 14:54:13 +0100 Message-Id: <20231102135417.336334-4-pierre.gondois@arm.com> In-Reply-To: <20231102135417.336334-1-pierre.gondois@arm.com> References: <20231102135417.336334-1-pierre.gondois@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,pierre.gondois@arm.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: bZaU5c83Hh1EyaEnFN6nrVswx7686176AA= Content-Transfer-Encoding: quoted-printable X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=KjvN+14d; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=arm.com (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io A ArmReadIdAA64Isar0Reg() function was recently added to BaseLib. Use it instead of its ArmReadIdIsar0() equivalent, which was private to the BaseRngLib library. This also allows to avoid the confusion between the following registers: - ID_ISAR0_EL1: allows to probe for Divide instructions, Debug instructions, ... - ID_AA64ISAR0_EL1: AARCH64 specific register allowing to probe for AESE, RNDR, ... instructions Signed-off-by: Pierre Gondois --- .../BaseRngLib/AArch64/ArmReadIdIsar0.S | 30 ------------------- .../BaseRngLib/AArch64/ArmReadIdIsar0.asm | 30 ------------------- MdePkg/Library/BaseRngLib/AArch64/ArmRng.h | 12 -------- MdePkg/Library/BaseRngLib/AArch64/Rndr.c | 14 ++------- MdePkg/Library/BaseRngLib/BaseRngLib.inf | 2 -- 5 files changed, 3 insertions(+), 85 deletions(-) delete mode 100644 MdePkg/Library/BaseRngLib/AArch64/ArmReadIdIsar0.S delete mode 100644 MdePkg/Library/BaseRngLib/AArch64/ArmReadIdIsar0.asm diff --git a/MdePkg/Library/BaseRngLib/AArch64/ArmReadIdIsar0.S b/MdePkg/Li= brary/BaseRngLib/AArch64/ArmReadIdIsar0.S deleted file mode 100644 index d30b63fe5c68..000000000000 --- a/MdePkg/Library/BaseRngLib/AArch64/ArmReadIdIsar0.S +++ /dev/null @@ -1,30 +0,0 @@ -#-------------------------------------------------------------------------= -----=0D -#=0D -# ArmReadIdIsar0() for AArch64=0D -#=0D -# Copyright (c) 2021, NUVIA Inc. All rights reserved.
=0D -#=0D -# SPDX-License-Identifier: BSD-2-Clause-Patent=0D -#=0D -#-------------------------------------------------------------------------= -----=0D -=0D -.text=0D -.p2align 2=0D -GCC_ASM_EXPORT(ArmReadIdIsar0)=0D -=0D -#/**=0D -# Reads the ID_AA64ISAR0 Register.=0D -#=0D -# @return The contents of the ID_AA64ISAR0 register.=0D -#=0D -#**/=0D -#UINT64=0D -#EFIAPI=0D -#ArmReadIdIsar0 (=0D -# VOID=0D -# );=0D -#=0D -ASM_PFX(ArmReadIdIsar0):=0D - AARCH64_BTI(c)=0D - mrs x0, id_aa64isar0_el1 // Read ID_AA64ISAR0 Register=0D - ret=0D diff --git a/MdePkg/Library/BaseRngLib/AArch64/ArmReadIdIsar0.asm b/MdePkg/= Library/BaseRngLib/AArch64/ArmReadIdIsar0.asm deleted file mode 100644 index 1d9f9a808c0c..000000000000 --- a/MdePkg/Library/BaseRngLib/AArch64/ArmReadIdIsar0.asm +++ /dev/null @@ -1,30 +0,0 @@ -;-------------------------------------------------------------------------= -----=0D -;=0D -; ArmReadIdIsar0() for AArch64=0D -;=0D -; Copyright (c) 2021, NUVIA Inc. All rights reserved.
=0D -;=0D -; SPDX-License-Identifier: BSD-2-Clause-Patent=0D -;=0D -;-------------------------------------------------------------------------= -----=0D -=0D - EXPORT ArmReadIdIsar0=0D - AREA BaseLib_LowLevel, CODE, READONLY=0D -=0D -;/**=0D -; Reads the ID_AA64ISAR0 Register.=0D -;=0D -; @return The contents of the ID_AA64ISAR0 register.=0D -;=0D -;**/=0D -;UINT64=0D -;EFIAPI=0D -;ArmReadIdIsar0 (=0D -; VOID=0D -; );=0D -;=0D -ArmReadIdIsar0=0D - mrs x0, id_aa64isar0_el1 // Read ID_AA64ISAR0 Register=0D - ret=0D -=0D - END=0D diff --git a/MdePkg/Library/BaseRngLib/AArch64/ArmRng.h b/MdePkg/Library/Ba= seRngLib/AArch64/ArmRng.h index 2d6ef48ab941..b4b3c97071bb 100644 --- a/MdePkg/Library/BaseRngLib/AArch64/ArmRng.h +++ b/MdePkg/Library/BaseRngLib/AArch64/ArmRng.h @@ -27,16 +27,4 @@ ArmRndr ( OUT UINT64 *Rand=0D );=0D =0D -/**=0D - Reads the ID_AA64ISAR0 Register.=0D -=0D - @return The contents of the ID_AA64ISAR0 register.=0D -=0D -**/=0D -UINT64=0D -EFIAPI=0D -ArmReadIdIsar0 (=0D - VOID=0D - );=0D -=0D #endif /* ARM_RNG_H_ */=0D diff --git a/MdePkg/Library/BaseRngLib/AArch64/Rndr.c b/MdePkg/Library/Base= RngLib/AArch64/Rndr.c index d39db62153ee..684b02f018b6 100644 --- a/MdePkg/Library/BaseRngLib/AArch64/Rndr.c +++ b/MdePkg/Library/BaseRngLib/AArch64/Rndr.c @@ -21,11 +21,6 @@ =0D STATIC BOOLEAN mRndrSupported;=0D =0D -//=0D -// Bit mask used to determine if RNDR instruction is supported.=0D -//=0D -#define RNDR_MASK ((UINT64)MAX_UINT16 << 60U)=0D -=0D /**=0D The constructor function checks whether or not RNDR instruction is suppo= rted=0D by the host hardware.=0D @@ -43,16 +38,13 @@ BaseRngLibConstructor ( VOID=0D )=0D {=0D - UINT64 Isar0;=0D -=0D //=0D // Determine RNDR support by examining bits 63:60 of the ISAR0 register = returned by=0D // MSR. A non-zero value indicates that the processor supports the RNDR = instruction.=0D //=0D - Isar0 =3D ArmReadIdIsar0 ();=0D - ASSERT ((Isar0 & RNDR_MASK) !=3D 0);=0D -=0D - mRndrSupported =3D ((Isar0 & RNDR_MASK) !=3D 0);=0D + mRndrSupported =3D !((ArmReadIdAA64Isar0Reg () >> ARM_ID_AA64ISAR0_EL1_A= ES_SHIFT) &=0D + ARM_ID_AA64ISAR0_EL1_AES_MASK);=0D + ASSERT (mRndrSupported);=0D =0D return EFI_SUCCESS;=0D }=0D diff --git a/MdePkg/Library/BaseRngLib/BaseRngLib.inf b/MdePkg/Library/Base= RngLib/BaseRngLib.inf index 49503b139be9..bd89cf3a1927 100644 --- a/MdePkg/Library/BaseRngLib/BaseRngLib.inf +++ b/MdePkg/Library/BaseRngLib/BaseRngLib.inf @@ -38,10 +38,8 @@ [Sources.AARCH64] AArch64/Rndr.c=0D AArch64/ArmRng.h=0D =0D - AArch64/ArmReadIdIsar0.S | GCC=0D AArch64/ArmRng.S | GCC=0D =0D - AArch64/ArmReadIdIsar0.asm | MSFT=0D AArch64/ArmRng.asm | MSFT=0D =0D [Guids.AARCH64]=0D --=20 2.25.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#110550): https://edk2.groups.io/g/devel/message/110550 Mute This Topic: https://groups.io/mt/102342397/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=-=-=-=-=-=-=-=-=-=-=-