From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id 7F52CAC0B79 for ; Fri, 3 Nov 2023 06:41:26 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=wDig9dlJSYeHUNCRzumgwfPdeGx14rgGPk8DucQ98R4=; c=relaxed/simple; d=groups.io; h=From:To:Cc:Subject:Date:Message-Id:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Transfer-Encoding; s=20140610; t=1698993685; v=1; b=NnF24yx8/nMMs5UdR2oHzEH7PgsJwH2PFVQfW2VBJmy3JtCcZ0xPaAJ4+VLDS7GvOGSexNZT jwxJGJVnjRxlJP878hQ3xuPmwX7VnDt+D2OnMErGXe12CAexQxd4vG+UqpEVnePMyprIvZA556U EPi6V7BMRevilCCGltqszwz0= X-Received: by 127.0.0.2 with SMTP id sITqYY7687511xSOweIXOyMU; Thu, 02 Nov 2023 23:41:25 -0700 X-Received: from mgamail.intel.com (mgamail.intel.com [192.55.52.120]) by mx.groups.io with SMTP id smtpd.web10.29262.1698988605265398411 for ; Thu, 02 Nov 2023 22:16:45 -0700 X-IronPort-AV: E=McAfee;i="6600,9927,10882"; a="387769925" X-IronPort-AV: E=Sophos;i="6.03,273,1694761200"; d="scan'208";a="387769925" X-Received: from orviesa001.jf.intel.com ([10.64.159.141]) by fmsmga104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Nov 2023 22:16:44 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.03,273,1694761200"; d="scan'208";a="9254647" X-Received: from vkasired-desk2.fm.intel.com ([10.105.128.7]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 02 Nov 2023 22:16:44 -0700 From: "Vivek Kasireddy" To: devel@edk2.groups.io Cc: Vivek Kasireddy , Gerd Hoffmann , Ard Biesheuvel , Laszlo Ersek , Dongwon Kim Subject: [edk2-devel] [PATCH v1] OvmfPkg/PlatformInitLib: Don't override user specified PciMmio64Size Date: Thu, 2 Nov 2023 22:15:19 -0700 Message-Id: <20231103051519.277323-1-vivek.kasireddy@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,vivek.kasireddy@intel.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: N6FcTDnzuAyWeEUJnrK84uagx7686176AA= Content-Transfer-Encoding: quoted-printable X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=NnF24yx8; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=intel.com (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io If the user specified a size for the PCI MMIO window via the option: -fw_cfg name=3Dopt/ovmf/X-PciMmio64Mb,string=3D32768 then this patch ensures that the mmio window is not resized again. Essentially, this prevents the change introduced in the following patch from taking effect: commit ecb778d0ac62560aa172786ba19521f27bc3f650 Author: Gerd Hoffmann Date: Tue Oct 4 15:47:27 2022 +0200 OvmfPkg/PlatformInitLib: dynamic mmio window size In case we have a reliable PhysMemAddressWidth use that to dynamically size the 64bit address window. Allocate 1/8 of the physical address space and place the window at the upper end of the address space. The problem this patch is trying to solve is the VFIO mapping failures: VFIO_MAP_DMA failed: Invalid argument vfio_dma_map(0x557b2f2736d0, 0x380000000000, 0x1000000, 0x7f98ac400000) =3D= -22 (Invalid argument) that occur when we try to passthrough the graphics device to the guest: qemu-system-x86_64 -m 4096 -enable-kvm -cpu host -smp cores=3D4,threads=3D2= ,sockets=3D1 -device vfio-pci,host=3D0000:00:02.0 -bios OVMF.fd -nographic The above failures seem to occur because of a mismatch between the PhysMemAddressWidth and the Host IOMMU address width. More specifically, if the PhysMemAddressWidth is bigger than the IOMMU address width, VFIO fails to map the MMIO regions as the IOVAs would be larger than the IOMMU aperture regions. When tested on modern Intel platforms such as ADL, MTL, etc, OVMF determines PhysMemAddressWidth =3D 46 which matches the Host address width but the IOMMU address width seems to range anywhere from 38 to 48 depending on the IOMMU hardware capabilities, version, etc. One way to address this issue is if we ensure that PhysMemAddressWidth matches IOMMU address width: -cpu host,host-phys-bits=3Don,host-phys-bits-limit=3D However, this requires the user to figure out the IOMMU address width; which can be determined by looking at the 16-21 bits of the cap value: cat /sys/devices/virtual/iommu/dmar0/intel-iommu/cap or by reading the DMAR_CAP_REG register. But this does not seem like a reasonable approach to solve this problem. Therefore, this problem requires an OVMF specific solution to retain the prior behavior. To this end, this patch reuses the X-PciMmio64Mb option to opt-out of the behavior introduced in the above commit instead of adding a new option or mechanism. Cc: Gerd Hoffmann Cc: Ard Biesheuvel Cc: Laszlo Ersek Cc: Dongwon Kim Signed-off-by: Vivek Kasireddy --- OvmfPkg/Include/Library/PlatformInitLib.h | 1 + OvmfPkg/Library/PlatformInitLib/MemDetect.c | 4 +++- 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/OvmfPkg/Include/Library/PlatformInitLib.h b/OvmfPkg/Include/Li= brary/PlatformInitLib.h index 57b18b94d9..e8ea3defa2 100644 --- a/OvmfPkg/Include/Library/PlatformInitLib.h +++ b/OvmfPkg/Include/Library/PlatformInitLib.h @@ -55,6 +55,7 @@ typedef struct { BOOLEAN QemuFwCfgChecked;=0D BOOLEAN QemuFwCfgSupported;=0D BOOLEAN QemuFwCfgDmaSupported;=0D + BOOLEAN QemuFwCfgSizeSpecified;=0D } EFI_HOB_PLATFORM_INFO;=0D #pragma pack()=0D =0D diff --git a/OvmfPkg/Library/PlatformInitLib/MemDetect.c b/OvmfPkg/Library/= PlatformInitLib/MemDetect.c index 662e7e85bb..a53a1e24e4 100644 --- a/OvmfPkg/Library/PlatformInitLib/MemDetect.c +++ b/OvmfPkg/Library/PlatformInitLib/MemDetect.c @@ -485,6 +485,7 @@ PlatformGetFirstNonAddress ( case EFI_SUCCESS:=0D if (FwCfgPciMmio64Mb <=3D 0x1000000) {=0D PlatformInfoHob->PcdPciMmio64Size =3D LShiftU64 (FwCfgPciMmio64Mb,= 20);=0D + PlatformInfoHob->QemuFwCfgSizeSpecified =3D TRUE;=0D break;=0D }=0D =0D @@ -861,7 +862,8 @@ PlatformAddressWidthInitialization ( }=0D =0D PlatformAddressWidthFromCpuid (PlatformInfoHob, TRUE);=0D - if (PlatformInfoHob->PhysMemAddressWidth !=3D 0) {=0D + if (PlatformInfoHob->PhysMemAddressWidth !=3D 0 &&=0D + !PlatformInfoHob->QemuFwCfgSizeSpecified) {=0D // physical address width is known=0D PlatformDynamicMmioWindow (PlatformInfoHob);=0D return;=0D --=20 2.39.2 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. 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