[edk2-devel] [PATCH v1 3/7] UefiCpuPkg: Adds SmmCpuSyncLib library class

["Wu, Jiaxin" <jiaxin.wu@intel.com>]

Intel is planning to provide different SMM CPU Sync implementation
along with some specific registers to improve the SMI performance,
hence need SmmCpuSyncLib Library for Intel.

This patch is to:
1.Adds SmmCpuSyncLib Library class in UefiCpuPkg.dec.
2.Adds SmmCpuSyncLib.h function declaration header file.

Change-Id: Ib7f5e317526e8b9e29b65e072bdb485dbd678817
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Zeng Star <star.zeng@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Signed-off-by: Jiaxin Wu <jiaxin.wu@intel.com>
---
 UefiCpuPkg/Include/Library/SmmCpuSyncLib.h | 191 +++++++++++++++++++++++++++++
 UefiCpuPkg/UefiCpuPkg.dec                  |   3 +
 2 files changed, 194 insertions(+)
 create mode 100644 UefiCpuPkg/Include/Library/SmmCpuSyncLib.h

diff --git a/UefiCpuPkg/Include/Library/SmmCpuSyncLib.h b/UefiCpuPkg/Include/Library/SmmCpuSyncLib.h
new file mode 100644
index 0000000000..b9b190c516
--- /dev/null
+++ b/UefiCpuPkg/Include/Library/SmmCpuSyncLib.h
@@ -0,0 +1,191 @@
+/** @file
+Library that provides SMM CPU Sync related operations.
+
+Copyright (c) 2023, Intel Corporation. All rights reserved.<BR>
+SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#ifndef SMM_CPU_SYNC_LIB_H_
+#define SMM_CPU_SYNC_LIB_H_
+
+#include <Uefi/UefiBaseType.h>
+
+/**
+  Creates and Init a new Smm Cpu Sync context.
+
+  @param[in]  NumberOfCpus         The number of processors in the system.
+
+  @return     Pointer to an allocated Smm Cpu Sync context object.
+              If the creation failed, returns NULL.
+
+**/
+VOID *
+EFIAPI
+SmmCpuSyncContextInit (
+  IN UINTN  NumberOfCpus
+  );
+
+/**
+  Deinit an allocated Smm Cpu Sync context object.
+
+  @param[in]  SmmCpuSyncCtx    Pointer to the Smm Cpu Sync context object to be released.
+
+**/
+VOID
+EFIAPI
+SmmCpuSyncContextDeinit (
+  IN VOID  *SmmCpuSyncCtx
+  );
+
+/**
+  Reset Smm Cpu Sync context object.
+
+  @param[in]  SmmCpuSyncCtx    Pointer to the Smm Cpu Sync context object to be released.
+
+**/
+VOID
+EFIAPI
+SmmCpuSyncContextReset (
+  IN VOID  *SmmCpuSyncCtx
+  );
+
+/**
+  Get current arrived CPU count.
+
+  @param[in]  SmmCpuSyncCtx    Pointer to the Smm Cpu Sync context object to be released.
+
+  @return     Current number of arrived CPU count.
+              -1: indicate the door has been locked.
+
+**/
+UINT32
+EFIAPI
+SmmCpuSyncGetArrivedCpuCount (
+  IN VOID  *SmmCpuSyncCtx
+  );
+
+/**
+  Performs an atomic operation to check in CPU.
+  Check in CPU successfully if the returned arrival CPU count value is
+  positive, otherwise indicate the door has been locked, the CPU can
+  not checkin.
+
+  @param[in]  SmmCpuSyncCtx    Pointer to the Smm CPU Sync context object to be released.
+  @param[in]  CpuIndex         Pointer to the CPU Index to checkin.
+
+  @return     Positive value (>0):     CPU arrival count number after check in CPU successfully.
+              Nonpositive value (<=0): check in CPU failure.
+
+**/
+INT32
+EFIAPI
+SmmCpuSyncCheckInCpu (
+  IN VOID   *SmmCpuSyncCtx,
+  IN UINTN  CpuIndex
+  );
+
+/**
+  Performs an atomic operation to check out CPU.
+  Check out CPU successfully if the returned arrival CPU count value is
+  nonnegative, otherwise indicate the door has been locked, the CPU can
+  not checkout.
+
+  @param[in]  SmmCpuSyncCtx    Pointer to the Smm Cpu Sync context object to be released.
+  @param[in]  CpuIndex         Pointer to the Cpu Index to checkout.
+
+  @return     Nonnegative value (>=0): CPU arrival count number after check out CPU successfully.
+              Negative value (<0):     Check out CPU failure.
+
+
+**/
+INT32
+EFIAPI
+SmmCpuSyncCheckOutCpu (
+  IN VOID   *SmmCpuSyncCtx,
+  IN UINTN  CpuIndex
+  );
+
+/**
+  Performs an atomic operation lock door for CPU checkin or checkout.
+  With this function, CPU can not check in via SmmCpuSyncCheckInCpu () or
+  check out via SmmCpuSyncCheckOutCpu ().
+
+  @param[in]  SmmCpuSyncCtx    Pointer to the Smm Cpu Sync context object to be released.
+  @param[in]  CpuIndex         Pointer to the Cpu Index to lock door.
+
+  @return     CPU arrival count number.
+
+**/
+UINT32
+EFIAPI
+SmmCpuSyncLockDoor (
+  IN VOID   *SmmCpuSyncCtx,
+  IN UINTN  CpuIndex
+  );
+
+/**
+  Used for BSP to wait all APs.
+
+  @param[in]  SmmCpuSyncCtx    Pointer to the Smm Cpu Sync context object.
+  @param[in]  NumberOfAPs      Number of APs need to wait.
+  @param[in]  BspIndex         Pointer to the BSP Index.
+
+**/
+VOID
+EFIAPI
+SmmCpuSyncWaitForAllAPs (
+  IN VOID   *SmmCpuSyncCtx,
+  IN UINTN  NumberOfAPs,
+  IN UINTN  BspIndex
+  );
+
+/**
+  Used for BSP to release one AP.
+
+  @param[in]  SmmCpuSyncCtx    Pointer to the Smm Cpu Sync context object.
+  @param[in]  CpuIndex         Pointer to the Cpu Index, indicate which AP need to be released.
+  @param[in]  BspIndex         Pointer to the BSP Index.
+
+**/
+VOID
+EFIAPI
+SmmCpuSyncReleaseOneAp   (
+  IN VOID   *SmmCpuSyncCtx,
+  IN UINTN  CpuIndex,
+  IN UINTN  BspIndex
+  );
+
+/**
+  Used for AP to wait BSP.
+
+  @param[in]  SmmCpuSyncCtx    Pointer to the Smm Cpu Sync context object.
+  @param[in]  CpuIndex         Pointer to the Cpu Index, indicate which AP wait BSP.
+  @param[in]  BspIndex         Pointer to the BSP Index.
+
+**/
+VOID
+EFIAPI
+SmmCpuSyncWaitForBsp (
+  IN VOID   *SmmCpuSyncCtx,
+  IN UINTN  CpuIndex,
+  IN UINTN  BspIndex
+  );
+
+/**
+  Used for AP to release BSP.
+
+  @param[in]  SmmCpuSyncCtx    Pointer to the Smm Cpu Sync context object.
+  @param[in]  CpuIndex         Pointer to the Cpu Index, indicate which AP release BSP.
+  @param[in]  BspIndex         Pointer to the BSP Index.
+
+**/
+VOID
+EFIAPI
+SmmCpuSyncReleaseBsp (
+  IN VOID   *SmmCpuSyncCtx,
+  IN UINTN  CpuIndex,
+  IN UINTN  BspIndex
+  );
+
+#endif
diff --git a/UefiCpuPkg/UefiCpuPkg.dec b/UefiCpuPkg/UefiCpuPkg.dec
index 0b5431dbf7..20ab079219 100644
--- a/UefiCpuPkg/UefiCpuPkg.dec
+++ b/UefiCpuPkg/UefiCpuPkg.dec
@@ -62,10 +62,13 @@
   CpuPageTableLib|Include/Library/CpuPageTableLib.h
 
   ## @libraryclass   Provides functions for manipulating smram savestate registers.
   MmSaveStateLib|Include/Library/MmSaveStateLib.h
 
+  ## @libraryclass   Provides functions for SMM CPU Sync Operation.
+  SmmCpuSyncLib|Include/Library/SmmCpuSyncLib.h
+
 [LibraryClasses.RISCV64]
   ##  @libraryclass  Provides functions to manage MMU features on RISCV64 CPUs.
   ##
   RiscVMmuLib|Include/Library/BaseRiscVMmuLib.h
 
-- 
2.16.2.windows.1



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