From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id 8F76A7803D7 for ; Tue, 7 Nov 2023 05:06:59 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=5fj7wCpAzf9iPF/iZbZpLuJ5jZX8Hqn88qVDtiWends=; c=relaxed/simple; d=groups.io; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Transfer-Encoding; s=20140610; t=1699333618; v=1; b=OKwjBXs+lTa18jJXpky80cSRS1xjOjfpO7bLpJ+4xwySIVm1LqFq0ppn3XO3iVUQUglCHRsE tsU3gn1zUKgHSUUfRETgRV0rRawdyfC9AjtPaVcM6n24SH3y/913/bzIml59CTBj3QjZKS2gGGi pI7/hZlX5CQ9Hu+r/ikAWeaI= X-Received: by 127.0.0.2 with SMTP id jxcaYY7687511xJmIZaBGdGp; Mon, 06 Nov 2023 21:06:58 -0800 X-Received: from mail-io1-f51.google.com (mail-io1-f51.google.com [209.85.166.51]) by mx.groups.io with SMTP id smtpd.web10.4315.1699333617754989135 for ; Mon, 06 Nov 2023 21:06:57 -0800 X-Received: by mail-io1-f51.google.com with SMTP id ca18e2360f4ac-7a9857c14c5so191398839f.3 for ; Mon, 06 Nov 2023 21:06:57 -0800 (PST) X-Gm-Message-State: hqRJxnMEAW3Amb7Xb3CkREzJx7686176AA= X-Google-Smtp-Source: AGHT+IFoak6WJ1lA9cvYX15l5LFVYF20htJqPAS1Rm/CeVytNN48KKnx8R7WgKj+fhbi0FpC2feOIw== X-Received: by 2002:a05:6e02:1e07:b0:357:8d71:347f with SMTP id g7-20020a056e021e0700b003578d71347fmr2331636ila.8.1699333616813; Mon, 06 Nov 2023 21:06:56 -0800 (PST) X-Received: from user-Latitude-5420.dc1.ventanamicro.com ([2401:4900:1f24:775d:7335:84a5:7d11:9393]) by smtp.gmail.com with ESMTPSA id bu10-20020a056e02350a00b00359a2d8d0d2sm1360471ilb.67.2023.11.06.21.06.54 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 06 Nov 2023 21:06:56 -0800 (PST) From: "Ranbir Singh" To: devel@edk2.groups.io, rsingh@ventanamicro.com Cc: Ray Ni , Veeresh Sangolli Subject: [edk2-devel] [PATCH v2 1/2] MdeModulePkg/Bus/Pci/PciHostBridgeDxe: Fix OVERRUN Coverity issues Date: Tue, 7 Nov 2023 10:36:46 +0530 Message-Id: <20231107050647.59613-2-rsingh@ventanamicro.com> In-Reply-To: <20231107050647.59613-1-rsingh@ventanamicro.com> References: <20231107050647.59613-1-rsingh@ventanamicro.com> MIME-Version: 1.0 Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,rsingh@ventanamicro.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: Content-Transfer-Encoding: quoted-printable X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=OKwjBXs+; dmarc=none; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io From: Ranbir Singh The function NotifyPhase has a check ASSERT (Index < TypeMax); but this comes into play only in DEBUG mode. In Release mode, there is no handling if the Index value is within array limits or not. If for whatever reasons, the Index does not get re-assigned to Index2 at line 137, then it remains at TypeMax as assigned earlier at line 929. This poses array overrun risk at lines 942 and 943. It is better to deploy a safety check on Index limit before accessing array elements. REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4212 Cc: Ray Ni Co-authored-by: Veeresh Sangolli Signed-off-by: Ranbir Singh Signed-off-by: Ranbir Singh --- MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c b/MdeMod= ulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c index d573e532bac8..519e1369f85e 100644 --- a/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c +++ b/MdeModulePkg/Bus/Pci/PciHostBridgeDxe/PciHostBridge.c @@ -939,6 +939,11 @@ NotifyPhase ( }=0D =0D ASSERT (Index < TypeMax);=0D +=0D + if (Index >=3D TypeMax) {=0D + continue;=0D + }=0D +=0D ResNodeHandled[Index] =3D TRUE;=0D Alignment =3D RootBridge->ResAllocNode[Index].Alig= nment;=0D BitsOfAlignment =3D LowBitSet64 (Alignment + 1);=0D --=20 2.34.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#110800): https://edk2.groups.io/g/devel/message/110800 Mute This Topic: https://groups.io/mt/102437647/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=-=-=-=-=-=-=-=-=-=-=-