From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id AD775D8108C for ; Thu, 9 Nov 2023 09:23:55 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=0NqQJ9y/J7IpgQynaPtdRzhEqO6ReI+zVfVHNiWDzpI=; c=relaxed/simple; d=groups.io; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Transfer-Encoding; s=20140610; t=1699521834; v=1; b=fGTyhXJkgmCHKb0NICJyNgNKt+mG9DjhrCYHkerDrOWZrB3UJ1YWQldxsD7N/fMZjOYueV2f hc7ckh8jXkxSxxrKzvITSQXYgFi+oCJ/zhQJJKmxPmgEr8htB8d1zTkBrf1Ik5aZBirbw6jUs+2 h6BuAJHWXE8FhCOjbgoE7Lyk= X-Received: by 127.0.0.2 with SMTP id SJM6YY7687511xqe6Ni7ZwXB; Thu, 09 Nov 2023 01:23:54 -0800 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web10.117371.1699521833774046602 for ; Thu, 09 Nov 2023 01:23:53 -0800 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id E664F1477; Thu, 9 Nov 2023 01:24:37 -0800 (PST) X-Received: from cam-smtp0.cambridge.arm.com (e126645.nice.arm.com [10.34.100.114]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id D1F6C3F703; Thu, 9 Nov 2023 01:23:51 -0800 (PST) From: "PierreGondois" To: devel@edk2.groups.io Cc: Jiewen Yao , Yi Li , Xiaoyu Lu , Guomin Jiang , Leif Lindholm , Ard Biesheuvel , Sami Mujawar , Gerd Hoffmann , Michael D Kinney , Liming Gao Subject: [edk2-devel] [PATCH v2 1/7] MdePkg/BaseLib: AARCH64: Add ArmReadCntPctReg() Date: Thu, 9 Nov 2023 10:23:01 +0100 Message-Id: <20231109092307.1770332-2-pierre.gondois@arm.com> In-Reply-To: <20231109092307.1770332-1-pierre.gondois@arm.com> References: <20231109092307.1770332-1-pierre.gondois@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,pierre.gondois@arm.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: ud1ZGbrp3hOhUXb6wP8DGDgGx7686176AA= Content-Transfer-Encoding: quoted-printable X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=fGTyhXJk; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=arm.com (policy=none) To enable AARCH64 native instruction support for Openssl, some interfaces must be implemented. OPENSSL_rdtsc() requests an access to a counter to get some non-trusted entropy. Add ArmReadCntPctReg() to read system count. A similar ArmReadCntPct() function is available in the ArmPkg, but the CryptoPkg where OPENSSL_rdtsc will reside cannot rely on the ArmPkg. Signed-off-by: Pierre Gondois --- MdePkg/Include/Library/BaseLib.h | 14 +++++++++ .../BaseLib/AArch64/ArmReadCntPctReg.S | 30 +++++++++++++++++++ .../BaseLib/AArch64/ArmReadCntPctReg.asm | 30 +++++++++++++++++++ MdePkg/Library/BaseLib/BaseLib.inf | 4 ++- 4 files changed, 77 insertions(+), 1 deletion(-) create mode 100644 MdePkg/Library/BaseLib/AArch64/ArmReadCntPctReg.S create mode 100644 MdePkg/Library/BaseLib/AArch64/ArmReadCntPctReg.asm diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/Base= Lib.h index 5d7067ee854e..b81c9dd83508 100644 --- a/MdePkg/Include/Library/BaseLib.h +++ b/MdePkg/Include/Library/BaseLib.h @@ -126,6 +126,20 @@ typedef struct { =0D #define BASE_LIBRARY_JUMP_BUFFER_ALIGNMENT 8=0D =0D +/**=0D + Reads the current value of CNTPCT_EL0 register.=0D +=0D + Reads and returns the current value of CNTPCT_EL0.=0D + This function is only available on AARCH64.=0D +=0D + @return The current value of CNTPCT_EL0=0D +**/=0D +UINT64=0D +EFIAPI=0D +ArmReadCntPctReg (=0D + VOID=0D + );=0D +=0D #endif // defined (MDE_CPU_AARCH64)=0D =0D #if defined (MDE_CPU_RISCV64)=0D diff --git a/MdePkg/Library/BaseLib/AArch64/ArmReadCntPctReg.S b/MdePkg/Lib= rary/BaseLib/AArch64/ArmReadCntPctReg.S new file mode 100644 index 000000000000..d5f3a0082a99 --- /dev/null +++ b/MdePkg/Library/BaseLib/AArch64/ArmReadCntPctReg.S @@ -0,0 +1,30 @@ +#-------------------------------------------------------------------------= -----=0D +#=0D +# ArmReadCntPctReg() for AArch64=0D +#=0D +# Copyright (c) 2023, Arm Limited. All rights reserved.
=0D +#=0D +# SPDX-License-Identifier: BSD-2-Clause-Patent=0D +#=0D +#-------------------------------------------------------------------------= -----=0D +=0D +.text=0D +.p2align 2=0D +GCC_ASM_EXPORT(ArmReadCntPctReg)=0D +=0D +#/**=0D +# Reads the CNTPCT_EL0 Register.=0D +#=0D +# @return The contents of the CNTPCT_EL0 register.=0D +#=0D +#**/=0D +#UINT64=0D +#EFIAPI=0D +#ArmReadCntPctReg (=0D +# VOID=0D +# );=0D +#=0D +ASM_PFX(ArmReadCntPctReg):=0D + AARCH64_BTI(c)=0D + mrs x0, cntpct_el0=0D + ret=0D diff --git a/MdePkg/Library/BaseLib/AArch64/ArmReadCntPctReg.asm b/MdePkg/L= ibrary/BaseLib/AArch64/ArmReadCntPctReg.asm new file mode 100644 index 000000000000..cfdfe4cea4eb --- /dev/null +++ b/MdePkg/Library/BaseLib/AArch64/ArmReadCntPctReg.asm @@ -0,0 +1,30 @@ +;-------------------------------------------------------------------------= -----=0D +;=0D +; ArmReadCntPctReg() for AArch64=0D +;=0D +; Copyright (c) 2023, Arm Limited. All rights reserved.
=0D +;=0D +; SPDX-License-Identifier: BSD-2-Clause-Patent=0D +;=0D +;-------------------------------------------------------------------------= -----=0D +=0D + EXPORT ArmReadCntPctReg=0D + AREA BaseLib_LowLevel, CODE, READONLY=0D +=0D +;/**=0D +; Reads the CNTPCT_EL0 Register.=0D +;=0D +; @return The contents of the CNTPCT_EL0 register.=0D +;=0D +;**/=0D +;UINT64=0D +;EFIAPI=0D +;ArmReadCntPctReg (=0D +; VOID=0D +; );=0D +;=0D +ArmReadCntPctReg=0D + mrs x0, cntpct_el0=0D + ret=0D +=0D + END=0D diff --git a/MdePkg/Library/BaseLib/BaseLib.inf b/MdePkg/Library/BaseLib/Ba= seLib.inf index 03c7b02e828b..24e5e6c3ecb5 100644 --- a/MdePkg/Library/BaseLib/BaseLib.inf +++ b/MdePkg/Library/BaseLib/BaseLib.inf @@ -3,7 +3,7 @@ #=0D # Copyright (c) 2007 - 2021, Intel Corporation. All rights reserved.
= =0D # Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.
= =0D -# Portions copyright (c) 2011 - 2013, ARM Ltd. All rights reserved.
=0D +# Portions copyright (c) 2011 - 2023, Arm Limited. All rights reserved.=0D # Copyright (c) 2020 - 2021, Hewlett Packard Enterprise Development LP. A= ll rights reserved.
=0D #=0D # SPDX-License-Identifier: BSD-2-Clause-Patent=0D @@ -376,6 +376,7 @@ [Sources.AARCH64] AArch64/SetJumpLongJump.S | GCC=0D AArch64/CpuBreakpoint.S | GCC=0D AArch64/SpeculationBarrier.S | GCC=0D + AArch64/ArmReadCntPctReg.S | GCC=0D =0D AArch64/MemoryFence.asm | MSFT=0D AArch64/SwitchStack.asm | MSFT=0D @@ -385,6 +386,7 @@ [Sources.AARCH64] AArch64/SetJumpLongJump.asm | MSFT=0D AArch64/CpuBreakpoint.asm | MSFT=0D AArch64/SpeculationBarrier.asm | MSFT=0D + AArch64/ArmReadCntPctReg.asm | MSFT=0D =0D [Sources.RISCV64]=0D Math64.c=0D --=20 2.25.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#110954): https://edk2.groups.io/g/devel/message/110954 Mute This Topic: https://groups.io/mt/102482399/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=-=-=-=-=-=-=-=-=-=-=-