From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id AF90A78003C for ; Fri, 10 Nov 2023 10:48:27 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=GVvmXQCs7MTQotUvB5XNlD4LBeHiNGbJJfzDwEx5U+E=; c=relaxed/simple; d=groups.io; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Transfer-Encoding; s=20140610; t=1699613306; v=1; b=lDzW/Iop/pAkJRAtcXMs9N+x/+5QwjemG+bCZcDo6xqnUK9KvXbc/VZxRIhCtHpYzQ79qBDE Nu4kH13tO6jINc4RZZALiMTGd/40ka5rJ6FeHaeSqaBeJ6wWLqUEIt85CWfbG6Us8aLiZ8zVGwH qBH0deFydPEXsvZ21OP+Dbxs= X-Received: by 127.0.0.2 with SMTP id IKNXYY7687511xMnPm6xcE1P; Fri, 10 Nov 2023 02:48:26 -0800 X-Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by mx.groups.io with SMTP id smtpd.web10.24740.1699613305508608162 for ; Fri, 10 Nov 2023 02:48:25 -0800 X-Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C088D12FC; Fri, 10 Nov 2023 02:49:09 -0800 (PST) X-Received: from e126645.arm.com (unknown [10.57.82.190]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 3B5B33F7C5; Fri, 10 Nov 2023 02:48:23 -0800 (PST) From: "PierreGondois" To: devel@edk2.groups.io Cc: Jiewen Yao , Yi Li , Xiaoyu Lu , Guomin Jiang , Leif Lindholm , Ard Biesheuvel , Sami Mujawar , Gerd Hoffmann Subject: [edk2-devel] [PATCH v3 1/6] ArmPkg/ArmLib: Move ArmReadIdAA64Isar0() to ArmLib Date: Fri, 10 Nov 2023 11:48:05 +0100 Message-Id: <20231110104810.2038376-2-pierre.gondois@arm.com> In-Reply-To: <20231110104810.2038376-1-pierre.gondois@arm.com> References: <20231110104810.2038376-1-pierre.gondois@arm.com> MIME-Version: 1.0 Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,pierre.gondois@arm.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: Fk4v5195xMM56CrbAVWzRfLMx7686176AA= Content-Transfer-Encoding: quoted-printable X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b="lDzW/Iop"; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=arm.com (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io Add ArmReadIdAA64Isar0() to ArmLib along with macros to read specific register fields. Signed-off-by: Pierre Gondois --- ArmPkg/Include/Library/ArmLib.h | 68 ++++++++++++++++++++++ ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h | 6 -- 2 files changed, 68 insertions(+), 6 deletions(-) diff --git a/ArmPkg/Include/Library/ArmLib.h b/ArmPkg/Include/Library/ArmLi= b.h index 6aa8a48f07f3..1edaa8d45962 100644 --- a/ArmPkg/Include/Library/ArmLib.h +++ b/ArmPkg/Include/Library/ArmLib.h @@ -805,6 +805,74 @@ ArmHasEte ( VOID=0D );=0D =0D +//=0D +// Bit shifts for the ID_AA64ISAR0_EL1 register.=0D +//=0D +#define ARM_ID_AA64ISAR0_EL1_AES_SHIFT (4U)=0D +#define ARM_ID_AA64ISAR0_EL1_SHA1_SHIFT (8U)=0D +#define ARM_ID_AA64ISAR0_EL1_SHA2_SHIFT (12U)=0D +#define ARM_ID_AA64ISAR0_EL1_CRC32_SHIFT (16U)=0D +#define ARM_ID_AA64ISAR0_EL1_ATOMIC_SHIFT (20U)=0D +#define ARM_ID_AA64ISAR0_EL1_RDM_SHIFT (28U)=0D +#define ARM_ID_AA64ISAR0_EL1_SHA3_SHIFT (32U)=0D +#define ARM_ID_AA64ISAR0_EL1_SM3_SHIFT (36U)=0D +#define ARM_ID_AA64ISAR0_EL1_SM4_SHIFT (40U)=0D +#define ARM_ID_AA64ISAR0_EL1_DP_SHIFT (44U)=0D +#define ARM_ID_AA64ISAR0_EL1_FHM_SHIFT (48U)=0D +#define ARM_ID_AA64ISAR0_EL1_TS_SHIFT (52U)=0D +#define ARM_ID_AA64ISAR0_EL1_TLB_SHIFT (56U)=0D +#define ARM_ID_AA64ISAR0_EL1_RNDR_SHIFT (60U)=0D +=0D +//=0D +// Bit masks for the ID_AA64ISAR0_EL1 fields.=0D +//=0D +#define ARM_ID_AA64ISAR0_EL1_AES_MASK (0xFU)=0D +#define ARM_ID_AA64ISAR0_EL1_SHA1_MASK (0xFU)=0D +#define ARM_ID_AA64ISAR0_EL1_SHA2_MASK (0xFU)=0D +#define ARM_ID_AA64ISAR0_EL1_CRC32_MASK (0xFU)=0D +#define ARM_ID_AA64ISAR0_EL1_ATOMIC_MASK (0xFU)=0D +#define ARM_ID_AA64ISAR0_EL1_RDM_MASK (0xFU)=0D +#define ARM_ID_AA64ISAR0_EL1_SHA3_MASK (0xFU)=0D +#define ARM_ID_AA64ISAR0_EL1_SM3_MASK (0xFU)=0D +#define ARM_ID_AA64ISAR0_EL1_SM4_MASK (0xFU)=0D +#define ARM_ID_AA64ISAR0_EL1_DP_MASK (0xFU)=0D +#define ARM_ID_AA64ISAR0_EL1_FHM_MASK (0xFU)=0D +#define ARM_ID_AA64ISAR0_EL1_TS_MASK (0xFU)=0D +#define ARM_ID_AA64ISAR0_EL1_TLB_MASK (0xFU)=0D +#define ARM_ID_AA64ISAR0_EL1_RNDR_MASK (0xFU)=0D +=0D +//=0D +// Bit masks for the ID_AA64ISAR0_EL1 field values.=0D +//=0D +#define ARM_ID_AA64ISAR0_EL1_AES_FEAT_AES_MASK (0x1U)=0D +#define ARM_ID_AA64ISAR0_EL1_AES_FEAT_PMULL_MASK (0x2U)=0D +#define ARM_ID_AA64ISAR0_EL1_SHA1_FEAT_SHA1_MASK (0x1U)=0D +#define ARM_ID_AA64ISAR0_EL1_SHA2_FEAT_SHA256_MASK (0x1U)=0D +#define ARM_ID_AA64ISAR0_EL1_SHA2_FEAT_SHA512_MASK (0x2U)=0D +#define ARM_ID_AA64ISAR0_EL1_CRC32_HAVE_CRC32_MASK (0x1U)=0D +#define ARM_ID_AA64ISAR0_EL1_ATOMIC_FEAT_LSE_MASK (0x2U)=0D +#define ARM_ID_AA64ISAR0_EL1_RDM_FEAT_RDM_MASK (0x1U)=0D +#define ARM_ID_AA64ISAR0_EL1_SHA3_FEAT_SHA3_MASK (0x1U)=0D +#define ARM_ID_AA64ISAR0_EL1_SM3_FEAT_SM3_MASK (0x1U)=0D +#define ARM_ID_AA64ISAR0_EL1_SM4_FEAT_SM4_MASK (0x1U)=0D +#define ARM_ID_AA64ISAR0_EL1_DP_FEAT_DOTPROD_MASK (0x1U)=0D +#define ARM_ID_AA64ISAR0_EL1_FHM_FEAT_FHM_MASK (0x1U)=0D +#define ARM_ID_AA64ISAR0_EL1_TS_FEAT_FLAGM_MASK (0x1U)=0D +#define ARM_ID_AA64ISAR0_EL1_TS_FEAT_FLAGM2_MASK (0x2U)=0D +#define ARM_ID_AA64ISAR0_EL1_TLB_FEAT_TLBIOS_MASK (0x1U)=0D +#define ARM_ID_AA64ISAR0_EL1_TLB_FEAT_TLBIRANGE_MASK (0x2U)=0D +#define ARM_ID_AA64ISAR0_EL1_RNDR_FEAT_RNG_MASK (0x1U)=0D +=0D +/** Read AA64Isar0 register.=0D +=0D + @return AA64Isar0's register value.=0D +**/=0D +UINTN=0D +EFIAPI=0D +ArmReadIdAA64Isar0 (=0D + VOID=0D + );=0D +=0D #endif // MDE_CPU_AARCH64=0D =0D #ifdef MDE_CPU_ARM=0D diff --git a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h b/ArmPkg/Library/Ar= mLib/AArch64/AArch64Lib.h index 6380a019ddc5..07181d940bdd 100644 --- a/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h +++ b/ArmPkg/Library/ArmLib/AArch64/AArch64Lib.h @@ -50,12 +50,6 @@ ArmReadIdAA64Dfr1 ( VOID=0D );=0D =0D -UINTN=0D -EFIAPI=0D -ArmReadIdAA64Isar0 (=0D - VOID=0D - );=0D -=0D UINTN=0D EFIAPI=0D ArmReadIdAA64Isar1 (=0D --=20 2.25.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#111029): https://edk2.groups.io/g/devel/message/111029 Mute This Topic: https://groups.io/mt/102504418/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=-=-=-=-=-=-=-=-=-=-=-