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From: "Sheng Wei" <w.sheng@intel.com>
To: devel@edk2.groups.io
Cc: Eric Dong <eric.dong@intel.com>, Ray Ni <ray.ni@intel.com>,
	Laszlo Ersek <lersek@redhat.com>, Wu Jiaxin <jiaxin.wu@intel.com>,
	Tan Dun <dun.tan@intel.com>
Subject: [edk2-devel] [PATCH v4 2/5] UefiCpuPkg: Use macro CR4_CET_BIT to replace hard code value in Cet.nasm.
Date: Mon, 13 Nov 2023 14:22:42 +0800	[thread overview]
Message-ID: <20231113062245.649-3-w.sheng@intel.com> (raw)
In-Reply-To: <20231113062245.649-1-w.sheng@intel.com>

Signed-off-by: Sheng Wei <w.sheng@intel.com>
Cc: Eric Dong <eric.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Wu Jiaxin <jiaxin.wu@intel.com>
Cc: Tan Dun <dun.tan@intel.com>
---
 UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/Cet.nasm | 5 +++--
 UefiCpuPkg/PiSmmCpuDxeSmm/X64/Cet.nasm  | 5 +++--
 2 files changed, 6 insertions(+), 4 deletions(-)

diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/Cet.nasm b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/Cet.nasm
index 9d66b9c5da..3d07da1cd4 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/Cet.nasm
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/Cet.nasm
@@ -5,6 +5,7 @@
 ;-------------------------------------------------------------------------------
 
 %include "Nasm.inc"
+%include "Cet.inc"
 
 SECTION .text
 
@@ -16,7 +17,7 @@ ASM_PFX(DisableCet):
     incsspd eax
 
     mov     eax, cr4
-    btr     eax, 23                      ; clear CET
+    btr     eax, CR4_CET_BIT             ; clear CET
     mov     cr4, eax
     ret
 
@@ -24,7 +25,7 @@ global ASM_PFX(EnableCet)
 ASM_PFX(EnableCet):
 
     mov     eax, cr4
-    bts     eax, 23                      ; set CET
+    bts     eax, CR4_CET_BIT             ; set CET
     mov     cr4, eax
 
     ; use jmp to skip the check for ret
diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/Cet.nasm b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/Cet.nasm
index 8bbdbb31cc..700aef4703 100644
--- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/Cet.nasm
+++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/Cet.nasm
@@ -5,6 +5,7 @@
 ;-------------------------------------------------------------------------------
 
 %include "Nasm.inc"
+%include "Cet.inc"
 
 DEFAULT REL
 SECTION .text
@@ -17,7 +18,7 @@ ASM_PFX(DisableCet):
     incsspq rax
 
     mov     rax, cr4
-    btr     eax, 23                      ; clear CET
+    btr     eax, CR4_CET_BIT             ; clear CET
     mov     cr4, rax
     ret
 
@@ -25,7 +26,7 @@ global ASM_PFX(EnableCet)
 ASM_PFX(EnableCet):
 
     mov     rax, cr4
-    bts     eax, 23                      ; set CET
+    bts     eax, CR4_CET_BIT             ; set CET
     mov     cr4, rax
 
     ; use jmp to skip the check for ret
-- 
2.26.2.windows.1



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  parent reply	other threads:[~2023-11-13  6:22 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-13  6:22 [edk2-devel] [PATCH v4 0/5] UefiCpuPkg: Add macro definitions for CET feature for NASM files Sheng Wei
2023-11-13  6:22 ` [edk2-devel] [PATCH v4 1/5] " Sheng Wei
2023-11-15  2:02   ` Ni, Ray
2023-11-15 10:33     ` Laszlo Ersek
2023-11-13  6:22 ` Sheng Wei [this message]
2023-11-13  6:22 ` [edk2-devel] [PATCH v4 3/5] UefiCpuPkg: Use CET macro definitions in Cet.inc for SmiEntry.nasm files Sheng Wei
2023-11-13  6:22 ` [edk2-devel] [PATCH v4 4/5] UefiCpuPkg: Only change CR4.CET bit for enable and disable CET Sheng Wei
2023-11-13  6:22 ` [edk2-devel] [PATCH v4 5/5] UefiCpuPkg: Backup and Restore MSR IA32_U_CET in SMI handler Sheng Wei
2023-11-13 18:14 ` [edk2-devel] [PATCH v4 0/5] UefiCpuPkg: Add macro definitions for CET feature for NASM files Laszlo Ersek

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