From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id 5F92F7803CE for ; Mon, 13 Nov 2023 06:23:01 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=B79Rgg1apI3qJ3K3D/zOxMy4qylypEupDA4CWI+hvsI=; c=relaxed/simple; d=groups.io; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Transfer-Encoding; s=20140610; t=1699856580; v=1; b=c3iYZ5dkMtvKDgVaPNZCTKVoOHcPWEVYHRDVz+FsjJmY36b0KT2awYt/6h3pGEqG6jkH7Iu5 wtV2obNIKehEckUQ2NesPTKGeCorrfTWTgfi+Z3NAsyAHEs+Bb7vK+PVfQPMPDimxcWPr3nMKdU G5lAvs7Obb8AYluXszU+uIo0= X-Received: by 127.0.0.2 with SMTP id b1YhYY7687511xvZlfjSUZyG; Sun, 12 Nov 2023 22:23:00 -0800 X-Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.9]) by mx.groups.io with SMTP id smtpd.web10.31729.1699856568636155442 for ; Sun, 12 Nov 2023 22:22:59 -0800 X-IronPort-AV: E=McAfee;i="6600,9927,10892"; a="9028412" X-IronPort-AV: E=Sophos;i="6.03,298,1694761200"; d="scan'208";a="9028412" X-Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orvoesa101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Nov 2023 22:22:59 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10892"; a="887849670" X-IronPort-AV: E=Sophos;i="6.03,298,1694761200"; d="scan'208";a="887849670" X-Received: from shwdesssddpdwei.ccr.corp.intel.com ([10.239.157.28]) by orsmga004.jf.intel.com with ESMTP; 12 Nov 2023 22:22:56 -0800 From: "Sheng Wei" To: devel@edk2.groups.io Cc: Eric Dong , Ray Ni , Laszlo Ersek , Wu Jiaxin , Tan Dun Subject: [edk2-devel] [PATCH v4 5/5] UefiCpuPkg: Backup and Restore MSR IA32_U_CET in SMI handler. Date: Mon, 13 Nov 2023 14:22:45 +0800 Message-Id: <20231113062245.649-6-w.sheng@intel.com> In-Reply-To: <20231113062245.649-1-w.sheng@intel.com> References: <20231113062245.649-1-w.sheng@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,w.sheng@intel.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: IltZQAXoSjxv5A7Plyne3Z3mx7686176AA= Content-Transfer-Encoding: quoted-printable X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=c3iYZ5dk; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=intel.com (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io OS may enable CET-IBT feature by set MSR IA32_U_CET.bit2. If IA32_U_CET.bit2 is set, CPU is in WAIT_FOR_ENDBRANCH state and the next assemble code is not ENDBR, it will trigger #CP exception when set CR4.CET bit. SMI handler needs to backup MSR IA32_U_CET and clear MSR IA32_U_CET before set CR4.CET bit, And SMI handler needs to restore MSR IA32_U_CET when exit SMI handler. Signed-off-by: Sheng Wei Cc: Eric Dong Cc: Ray Ni Cc: Laszlo Ersek Cc: Wu Jiaxin Cc: Tan Dun --- UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm | 15 +++++++++++++++ UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm | 15 +++++++++++++++ 2 files changed, 30 insertions(+) diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm b/UefiCpuPkg/PiSm= mCpuDxeSmm/Ia32/SmiEntry.nasm index 1da9afab97..9e1155dee6 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/Ia32/SmiEntry.nasm @@ -202,11 +202,21 @@ ASM_PFX(mPatchCetSupported): push edx=0D push eax=0D =0D + mov ecx, MSR_IA32_U_CET=0D + rdmsr=0D + push edx=0D + push eax=0D +=0D mov ecx, MSR_IA32_PL0_SSP=0D rdmsr=0D push edx=0D push eax=0D =0D + mov ecx, MSR_IA32_U_CET=0D + xor eax, eax=0D + xor edx, edx=0D + wrmsr=0D +=0D mov ecx, MSR_IA32_S_CET=0D mov eax, MSR_IA32_CET_SH_STK_EN=0D xor edx, edx=0D @@ -276,6 +286,11 @@ CetDone: pop edx=0D wrmsr=0D =0D + mov ecx, MSR_IA32_U_CET=0D + pop eax=0D + pop edx=0D + wrmsr=0D +=0D mov ecx, MSR_IA32_S_CET=0D pop eax=0D pop edx=0D diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm b/UefiCpuPkg/PiSmm= CpuDxeSmm/X64/SmiEntry.nasm index abf9f1a90a..881d3177f7 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/X64/SmiEntry.nasm @@ -217,6 +217,11 @@ ASM_PFX(mPatchCetSupported): push rdx=0D push rax=0D =0D + mov ecx, MSR_IA32_U_CET=0D + rdmsr=0D + push rdx=0D + push rax=0D +=0D mov ecx, MSR_IA32_PL0_SSP=0D rdmsr=0D push rdx=0D @@ -227,6 +232,11 @@ ASM_PFX(mPatchCetSupported): push rdx=0D push rax=0D =0D + mov ecx, MSR_IA32_U_CET=0D + xor eax, eax=0D + xor edx, edx=0D + wrmsr=0D +=0D mov ecx, MSR_IA32_S_CET=0D mov eax, MSR_IA32_CET_SH_STK_EN=0D xor edx, edx=0D @@ -325,6 +335,11 @@ mCetSupportedAbsAddr: pop rdx=0D wrmsr=0D =0D + mov ecx, MSR_IA32_U_CET=0D + pop rax=0D + pop rdx=0D + wrmsr=0D +=0D mov ecx, MSR_IA32_S_CET=0D pop rax=0D pop rdx=0D --=20 2.26.2.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. 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