From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id 3027BAC0967 for ; Fri, 24 Nov 2023 02:56:51 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=bSepyq+zV0c9zbAE/JkuKqzK+zUjFLJjjg99TdiWh9U=; c=relaxed/simple; d=groups.io; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Transfer-Encoding; s=20140610; t=1700794610; v=1; b=nLGlftG4+QF3T7Q7SFp01V6Tx5H/ulvY8GyOpaqi7O4e6d7KR7FLDTfd8rBfxyLC2rF1rFLs kJ4pl5uNWhAew3FP34Xq3FFnMTtIca0maM/M75YpnXAoXeQhGlhbNoeLlwh4h4ta0eleJm9RJL4 3yvrRuGzeIA9iR3HORV/nP2E= X-Received: by 127.0.0.2 with SMTP id ieUzYY7687511xfxgc3EYlR6; Thu, 23 Nov 2023 18:56:50 -0800 X-Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.126]) by mx.groups.io with SMTP id smtpd.web11.128508.1700794600506959702 for ; Thu, 23 Nov 2023 18:56:50 -0800 X-IronPort-AV: E=McAfee;i="6600,9927,10902"; a="377386883" X-IronPort-AV: E=Sophos;i="6.04,223,1695711600"; d="scan'208";a="377386883" X-Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Nov 2023 18:56:50 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10902"; a="802087297" X-IronPort-AV: E=Sophos;i="6.04,223,1695711600"; d="scan'208";a="802087297" X-Received: from shwdeopenlab813.ccr.corp.intel.com ([10.239.55.230]) by orsmga001.jf.intel.com with ESMTP; 23 Nov 2023 18:56:47 -0800 From: "Yuanhao Xie" To: devel@edk2.groups.io Cc: xieyuanh , Ray Ni , Eric Dong , Rahul Kumar , Tom Lendacky , Laszlo Ersek Subject: [edk2-devel] [Patch V4 3/3] UefiCpuPkg/MpInitLib: Extract Dump Microcode Revision as function. Date: Fri, 24 Nov 2023 10:56:35 +0800 Message-Id: <20231124025635.3629-4-yuanhao.xie@intel.com> In-Reply-To: <20231124025635.3629-1-yuanhao.xie@intel.com> References: <20231124025635.3629-1-yuanhao.xie@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,yuanhao.xie@intel.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: txJ9W8lIhyAbfi1vPXXEQEEix7686176AA= Content-Transfer-Encoding: 8bit X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=nLGlftG4; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=intel.com (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io There is no functional changes, only extract DumpMicrocodeRevision since only in PEI BSP will detect, apply microcode, and APs will sync microcode. Cc: Ray Ni Cc: Eric Dong Cc: Rahul Kumar Cc: Tom Lendacky Cc: Laszlo Ersek Signed-off-by: Yuanhao Xie --- UefiCpuPkg/Library/MpInitLib/Microcode.c | 39 +++++++++++++++++++++++++++++++++++++++ UefiCpuPkg/Library/MpInitLib/MpLib.c | 33 ++++----------------------------- UefiCpuPkg/Library/MpInitLib/MpLib.h | 10 ++++++++++ 3 files changed, 53 insertions(+), 29 deletions(-) diff --git a/UefiCpuPkg/Library/MpInitLib/Microcode.c b/UefiCpuPkg/Library/MpInitLib/Microcode.c index 8faa93024d..947caee97a 100644 --- a/UefiCpuPkg/Library/MpInitLib/Microcode.c +++ b/UefiCpuPkg/Library/MpInitLib/Microcode.c @@ -321,6 +321,45 @@ OnExit: FreePages (MicrocodeCpuIds, EFI_SIZE_TO_PAGES (CpuMpData->CpuCount * sizeof (EDKII_PEI_MICROCODE_CPU_ID))); } +/** + Dump the microcode revision for each core. + + @param[in] CpuMpData Pointer to CPU MP Data + **/ +VOID +DumpMicrocodeRevision ( + IN CPU_MP_DATA *CpuMpData + ) +{ + UINT32 ThreadId; + UINT32 ExpectedMicrocodeRevision; + CPU_INFO_IN_HOB *CpuInfoInHob; + UINTN Index; + + CpuInfoInHob = (CPU_INFO_IN_HOB *)(UINTN)CpuMpData->CpuInfoInHob; + for (Index = 0; Index < CpuMpData->CpuCount; Index++) { + GetProcessorLocationByApicId (CpuInfoInHob[Index].InitialApicId, NULL, NULL, &ThreadId); + if (ThreadId == 0) { + // + // MicrocodeDetect() loads microcode in first thread of each core, so, + // CpuMpData->CpuData[Index].MicrocodeEntryAddr is initialized only for first thread of each core. + // + ExpectedMicrocodeRevision = 0; + if (CpuMpData->CpuData[Index].MicrocodeEntryAddr != 0) { + ExpectedMicrocodeRevision = ((CPU_MICROCODE_HEADER *)(UINTN)CpuMpData->CpuData[Index].MicrocodeEntryAddr)->UpdateRevision; + } + + DEBUG (( + DEBUG_INFO, + "CPU[%04d]: Microcode revision = %08x, expected = %08x\n", + Index, + CpuMpData->CpuData[Index].MicrocodeRevision, + ExpectedMicrocodeRevision + )); + } + } +} + /** Shadow the required microcode patches data into memory. diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.c b/UefiCpuPkg/Library/MpInitLib/MpLib.c index 4dac931fa5..785042a8d7 100644 --- a/UefiCpuPkg/Library/MpInitLib/MpLib.c +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.c @@ -2283,37 +2283,12 @@ MpInitLibInitialize ( } } - // - // Dump the microcode revision for each core. - // - DEBUG_CODE_BEGIN (); - UINT32 ThreadId; - UINT32 ExpectedMicrocodeRevision; - - CpuInfoInHob = (CPU_INFO_IN_HOB *)(UINTN)CpuMpData->CpuInfoInHob; - for (Index = 0; Index < CpuMpData->CpuCount; Index++) { - GetProcessorLocationByApicId (CpuInfoInHob[Index].InitialApicId, NULL, NULL, &ThreadId); - if (ThreadId == 0) { - // - // MicrocodeDetect() loads microcode in first thread of each core, so, - // CpuMpData->CpuData[Index].MicrocodeEntryAddr is initialized only for first thread of each core. - // - ExpectedMicrocodeRevision = 0; - if (CpuMpData->CpuData[Index].MicrocodeEntryAddr != 0) { - ExpectedMicrocodeRevision = ((CPU_MICROCODE_HEADER *)(UINTN)CpuMpData->CpuData[Index].MicrocodeEntryAddr)->UpdateRevision; - } - - DEBUG (( - DEBUG_INFO, - "CPU[%04d]: Microcode revision = %08x, expected = %08x\n", - Index, - CpuMpData->CpuData[Index].MicrocodeRevision, - ExpectedMicrocodeRevision - )); - } + if (MpHandOff == NULL) { + DEBUG_CODE ( + DumpMicrocodeRevision (CpuMpData); + ); } - DEBUG_CODE_END (); // // Initialize global data for MP support // diff --git a/UefiCpuPkg/Library/MpInitLib/MpLib.h b/UefiCpuPkg/Library/MpInitLib/MpLib.h index 01b5b9c113..fd302e6845 100644 --- a/UefiCpuPkg/Library/MpInitLib/MpLib.h +++ b/UefiCpuPkg/Library/MpInitLib/MpLib.h @@ -734,6 +734,16 @@ MicrocodeDetect ( IN UINTN ProcessorNumber ); +/** + Dump the microcode revision for each core. + + @param[in] CpuMpData Pointer to CPU MP Data + **/ +VOID +DumpMicrocodeRevision ( + IN CPU_MP_DATA *CpuMpData + ); + /** Shadow the required microcode patches data into memory. -- 2.39.1.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. 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