From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id 07CCF9411F4 for ; Tue, 5 Dec 2023 05:49:32 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=wC2e4zFgHuwqB22/op3RWXaLGDK7F77uGssG8W5PIeQ=; c=relaxed/simple; d=groups.io; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Transfer-Encoding; s=20140610; t=1701755371; v=1; b=OGqly0Qk74KqEu0HstQ44v4Ev5VJOgVwZLdEzCQ8vVS0MqM2T6QcTNpVHNGgW3NV9DSayYbe kyBwx7L6b+QKnGN2xqNFxL4JmKJbG7vj9bUDGHoiDp2vxbls/JHM/J4+eyGLGlz3E1UZb8KxWxv 1QKu/BP6pRqXl9WwBSuQjid0= X-Received: by 127.0.0.2 with SMTP id opyeYY7687511x133VOzZBEt; Mon, 04 Dec 2023 21:49:31 -0800 X-Received: from mgamail.intel.com (mgamail.intel.com [134.134.136.126]) by mx.groups.io with SMTP id smtpd.web11.93095.1701755355027796431 for ; Mon, 04 Dec 2023 21:49:31 -0800 X-IronPort-AV: E=McAfee;i="6600,9927,10914"; a="378875439" X-IronPort-AV: E=Sophos;i="6.04,251,1695711600"; d="scan'208";a="378875439" X-Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2023 21:49:31 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10914"; a="720580549" X-IronPort-AV: E=Sophos;i="6.04,251,1695711600"; d="scan'208";a="720580549" X-Received: from shwdeopenlab702.ccr.corp.intel.com ([10.239.55.43]) by orsmga003-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Dec 2023 21:49:29 -0800 From: "duntan" To: devel@edk2.groups.io Cc: Eric Dong , Ray Ni , Rahul Kumar , Gerd Hoffmann Subject: [edk2-devel] [PATCH 6/6] UefiCpuPkg: Avoid assuming only one smmbasehob Date: Tue, 5 Dec 2023 13:49:00 +0800 Message-Id: <20231205054900.926-7-dun.tan@intel.com> In-Reply-To: <20231205054900.926-1-dun.tan@intel.com> References: <20231205054900.926-1-dun.tan@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,dun.tan@intel.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: pYrdhtgvBtSul4vNWeSelxzcx7686176AA= Content-Transfer-Encoding: 8bit X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=OGqly0Qk; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=intel.com (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io Modify the gSmmBaseHobGuid consumption code to remove the asuumption that there is only one gSmmBaseHobGuid. If the CPU number is big enough, there will be more than one SmmBaseHob in the HOB list. Signed-off-by: Dun Tan Cc: Eric Dong Cc: Ray Ni Cc: Rahul Kumar Cc: Gerd Hoffmann --- UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c | 142 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++------------ 1 file changed, 130 insertions(+), 12 deletions(-) diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c index d8d488b253..36fa5e779a 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c @@ -586,6 +586,130 @@ SmmReadyToLockEventNotify ( return EFI_SUCCESS; } +/** + Function to compare 2 SMM_BASE_HOB_DATA pointer based on ProcessorIndex. + + @param[in] Buffer1 pointer to SMM_BASE_HOB_DATA poiner to compare + @param[in] Buffer2 pointer to second SMM_BASE_HOB_DATA pointer to compare + + @retval 0 Buffer1 equal to Buffer2 + @retval <0 Buffer1 is less than Buffer2 + @retval >0 Buffer1 is greater than Buffer2 +**/ +INTN +EFIAPI +SmBaseHobCompare ( + IN CONST VOID *Buffer1, + IN CONST VOID *Buffer2 + ) +{ + if ((*(SMM_BASE_HOB_DATA **)Buffer1)->ProcessorIndex > (*(SMM_BASE_HOB_DATA **)Buffer2)->ProcessorIndex) { + return 1; + } else if ((*(SMM_BASE_HOB_DATA **)Buffer1)->ProcessorIndex < (*(SMM_BASE_HOB_DATA **)Buffer2)->ProcessorIndex) { + return -1; + } + + return 0; +} + +/** + Extract SmBase for all CPU from SmmBase HOB. + + @param[in] FirstSmmBaseGuidHob Pointer to First SmmBaseGuidHob. + @param[in] MaxNumberOfCpus Max NumberOfCpus. + @param[out] SmBaseBufferPointer Pointer to SmBase buffer pointer. + + @retval EFI_SUCCESS Successfully extract SmBase for all CPU from SmmBase HOB. + @retval RETURN_BUFFER_TOO_SMALL Fail to allocate memory. +**/ +EFI_STATUS +GetSmBaseFromSmmBaseHob ( + IN EFI_HOB_GUID_TYPE *FirstSmmBaseGuidHob, + IN UINTN MaxNumberOfCpus, + OUT UINTN **SmBaseBufferPointer + ) +{ + UINTN HobCount; + EFI_HOB_GUID_TYPE *GuidHob; + SMM_BASE_HOB_DATA *SmmBaseHobData; + UINTN NumberOfProcessors; + SMM_BASE_HOB_DATA **SmBaseHobPointerBuffer; + UINTN *SmBaseBuffer; + UINTN Index; + UINTN SortBuffer; + UINTN ProcessorIndex; + UINT64 PrevProcessorIndex; + + SmmBaseHobData = NULL; + Index = 0; + ProcessorIndex = 0; + PrevProcessorIndex = 0; + HobCount = 0; + NumberOfProcessors = 0; + GuidHob = FirstSmmBaseGuidHob; + + while (GuidHob != NULL) { + HobCount++; + SmmBaseHobData = GET_GUID_HOB_DATA (GuidHob); + NumberOfProcessors += SmmBaseHobData->NumberOfProcessors; + GuidHob = GetNextGuidHob (&gSmmBaseHobGuid, GET_NEXT_HOB (GuidHob)); + } + + ASSERT (NumberOfProcessors == MaxNumberOfCpus); + + SmBaseHobPointerBuffer = AllocatePool (sizeof (SMM_BASE_HOB_DATA *) * HobCount); + ASSERT (SmBaseHobPointerBuffer != NULL); + if (SmBaseHobPointerBuffer == NULL) { + return EFI_BUFFER_TOO_SMALL; + } + + // + // Record each SmmBaseHob pointer in the SmBaseHobPointerBuffer. + // + GuidHob = FirstSmmBaseGuidHob; + ASSERT (GuidHob != NULL); + while (Index < HobCount) { + SmBaseHobPointerBuffer[Index++] = GET_GUID_HOB_DATA (GuidHob); + GuidHob = GetNextGuidHob (&gSmmBaseHobGuid, GET_NEXT_HOB (GuidHob)); + } + + SmBaseBuffer = (UINTN *)AllocatePool (sizeof (UINTN) * (MaxNumberOfCpus)); + ASSERT (SmBaseBuffer != NULL); + if (SmBaseBuffer == NULL) { + return EFI_BUFFER_TOO_SMALL; + } + + QuickSort (SmBaseHobPointerBuffer, HobCount, sizeof (SMM_BASE_HOB_DATA *), (BASE_SORT_COMPARE)SmBaseHobCompare, &SortBuffer); + for (Index = 0; Index < HobCount; Index++) { + // + // Make sure no overlap and no gap in the CPU range covered by each HOB + // + ASSERT (SmBaseHobPointerBuffer[Index]->ProcessorIndex == PrevProcessorIndex); + + // + // Cache each SmBase in order. + // + if (sizeof (UINTN) == sizeof (UINT64)) { + CopyMem ( + SmBaseBuffer + PrevProcessorIndex, + &SmBaseHobPointerBuffer[Index]->SmBase, + sizeof (UINT64) * SmBaseHobPointerBuffer[Index]->NumberOfProcessors + ); + } else { + for (ProcessorIndex = 0; ProcessorIndex < SmBaseHobPointerBuffer[Index]->NumberOfProcessors; ProcessorIndex++) { + SmBaseBuffer[PrevProcessorIndex + ProcessorIndex] = (UINTN)SmBaseHobPointerBuffer[Index]->SmBase[ProcessorIndex]; + } + } + + PrevProcessorIndex += SmBaseHobPointerBuffer[Index]->NumberOfProcessors; + } + + FreePool (SmBaseHobPointerBuffer); + + *SmBaseBufferPointer = SmBaseBuffer; + return EFI_SUCCESS; +} + /** Function to compare 2 MP_INFORMATION2_HOB_DATA pointer based on ProcessorIndex. @@ -766,10 +890,8 @@ PiCpuSmmEntry ( UINTN ModelId; UINT32 Cr3; EFI_HOB_GUID_TYPE *GuidHob; - SMM_BASE_HOB_DATA *SmmBaseHobData; - GuidHob = NULL; - SmmBaseHobData = NULL; + GuidHob = NULL; PERF_FUNCTION_BEGIN (); @@ -1002,12 +1124,8 @@ PiCpuSmmEntry ( return RETURN_BUFFER_TOO_SMALL; } - SmmBaseHobData = GET_GUID_HOB_DATA (GuidHob); - - // - // Assume single instance of HOB produced, expect the HOB.NumberOfProcessors equals to the mMaxNumberOfCpus. - // - ASSERT (SmmBaseHobData->NumberOfProcessors == (UINT32)mMaxNumberOfCpus && SmmBaseHobData->ProcessorIndex == 0); + Status = GetSmBaseFromSmmBaseHob (GuidHob, mMaxNumberOfCpus, &mCpuHotPlugData.SmBase); + ASSERT_EFI_ERROR (Status); mSmmRelocated = TRUE; } else { // @@ -1053,8 +1171,6 @@ PiCpuSmmEntry ( // mCpuHotPlugData.ApicId = (UINT64 *)AllocatePool (sizeof (UINT64) * mMaxNumberOfCpus); ASSERT (mCpuHotPlugData.ApicId != NULL); - mCpuHotPlugData.SmBase = (UINTN *)AllocatePool (sizeof (UINTN) * mMaxNumberOfCpus); - ASSERT (mCpuHotPlugData.SmBase != NULL); mCpuHotPlugData.ArrayLength = (UINT32)mMaxNumberOfCpus; // @@ -1063,7 +1179,9 @@ PiCpuSmmEntry ( // size for each CPU in the platform // for (Index = 0; Index < mMaxNumberOfCpus; Index++) { - mCpuHotPlugData.SmBase[Index] = mSmmRelocated ? (UINTN)SmmBaseHobData->SmBase[Index] : (UINTN)Buffer + Index * TileSize - SMM_HANDLER_OFFSET; + if (!mSmmRelocated) { + mCpuHotPlugData.SmBase[Index] = (UINTN)Buffer + Index * TileSize - SMM_HANDLER_OFFSET; + } gSmmCpuPrivate->CpuSaveStateSize[Index] = sizeof (SMRAM_SAVE_STATE_MAP); gSmmCpuPrivate->CpuSaveState[Index] = (VOID *)(mCpuHotPlugData.SmBase[Index] + SMRAM_SAVE_STATE_MAP_OFFSET); -- 2.31.1.windows.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#112068): https://edk2.groups.io/g/devel/message/112068 Mute This Topic: https://groups.io/mt/102987142/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=-=-=-=-=-=-=-=-=-=-=-