From: "Benjamin Doron" <benjamin.doron00@gmail.com>
To: devel@edk2.groups.io
Cc: Guo Dong <guo.dong@intel.com>, Ray Ni <ray.ni@intel.com>,
Sean Rhodes <sean@starlabs.systems>,
James Lu <james.lu@intel.com>, Gua Guo <gua.guo@intel.com>
Subject: [edk2-devel] [PATCH v2 3/4] [WIP] UefiPayloadPkg/CbParseLib: Initial coreboot support for SMM payload
Date: Mon, 11 Dec 2023 17:39:11 -0500 [thread overview]
Message-ID: <20231211223919.1225565-3-benjamin.doron00@gmail.com> (raw)
In-Reply-To: <20231211223919.1225565-1-benjamin.doron00@gmail.com>
From: Benjamin Doron <benjamin.doron@9elements.com>
To be used with the https://review.coreboot.org/c/coreboot/+/70378
patch-series. Now feature complete, awaiting final upstream feedback
whether generating some data inside coreboot is okay.
Cc: Guo Dong <guo.dong@intel.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Sean Rhodes <sean@starlabs.systems>
Cc: James Lu <james.lu@intel.com>
Cc: Gua Guo <gua.guo@intel.com>
Signed-off-by: Benjamin Doron <benjamin.doron@9elements.com>
---
UefiPayloadPkg/Include/Coreboot.h | 50 ++++++++
UefiPayloadPkg/Library/CbParseLib/CbParseLib.c | 121 +++++++++++++++++++-
UefiPayloadPkg/Library/CbParseLib/CbParseLib.inf | 9 ++
3 files changed, 179 insertions(+), 1 deletion(-)
diff --git a/UefiPayloadPkg/Include/Coreboot.h b/UefiPayloadPkg/Include/Coreboot.h
index 6c33dda9ef85..add64d9623d9 100644
--- a/UefiPayloadPkg/Include/Coreboot.h
+++ b/UefiPayloadPkg/Include/Coreboot.h
@@ -270,6 +270,56 @@ struct fmap {
struct fmap_area areas[];
} __attribute__ ((packed));
+#define CB_TAG_PLD_SMM_REGISTER_INFO 0x0050
+struct lb_pld_generic_register {
+ UINT8 register_id;
+ UINT8 address_space_id;
+ UINT8 register_bit_width;
+ UINT8 register_bit_offset;
+ UINT32 value;
+ struct cbuint64 address;
+};
+
+struct lb_pld_smm_registers {
+ UINT32 tag;
+ UINT32 size;
+ UINT32 revision;
+ UINT32 count;
+ struct lb_pld_generic_register registers[];
+};
+
+#define CB_TAG_PLD_SMM_SMRAM 0x0051
+struct lb_pld_smram_descriptor {
+ struct cbuint64 physical_start;
+ struct cbuint64 physical_size;
+ struct cbuint64 region_state;
+};
+
+struct lb_pld_smram_descriptor_block {
+ UINT32 tag;
+ UINT32 size;
+ UINT32 number_of_smm_regions;
+ struct lb_pld_smram_descriptor descriptor[1];
+};
+
+#define CB_TAG_PLD_SPI_FLASH_INFO 0x0052
+struct lb_pld_spi_flash_info {
+ UINT32 tag;
+ UINT32 size;
+ UINT16 revision;
+ UINT16 flags;
+ struct lb_pld_generic_register spi_address;
+};
+
+#define CB_TAG_PLD_S3_COMMUNICATION 0x0054
+struct lb_pld_s3_communication {
+ UINT32 tag;
+ UINT32 size;
+ struct lb_pld_smram_descriptor comm_buffer;
+ UINT8 pld_acpi_s3_enable;
+ UINT8 pad[3];
+};
+
/* Helpful macros */
#define MEM_RANGE_COUNT(_rec) \
diff --git a/UefiPayloadPkg/Library/CbParseLib/CbParseLib.c b/UefiPayloadPkg/Library/CbParseLib/CbParseLib.c
index 8a353f77f635..46b164231fe5 100644
--- a/UefiPayloadPkg/Library/CbParseLib/CbParseLib.c
+++ b/UefiPayloadPkg/Library/CbParseLib/CbParseLib.c
@@ -7,15 +7,22 @@
**/
-#include <Uefi/UefiBaseType.h>
+#include <PiPei.h>
#include <Library/BaseLib.h>
#include <Library/BaseMemoryLib.h>
#include <Library/DebugLib.h>
#include <Library/PcdLib.h>
#include <Library/IoLib.h>
+#include <Library/HobLib.h>
#include <Library/BlParseLib.h>
+#include <Library/FmapParserLib.h>
#include <IndustryStandard/Acpi.h>
#include <Coreboot.h>
+#include <Guid/SmmRegisterInfoGuid.h>
+#include <Guid/SmramMemoryReserve.h>
+#include <Guid/SpiFlashInfoGuid.h>
+#include <Guid/NvVariableInfoGuid.h>
+#include <Guid/SmmS3CommunicationInfoGuid.h>
/**
Convert a packed value from cbuint64 to a UINT64 value.
@@ -602,5 +609,117 @@ ParseMiscInfo (
VOID
)
{
+ struct lb_pld_smm_registers *BlSmmRegisters;
+ PLD_SMM_REGISTERS *PldSmmRegisters;
+ UINTN Index;
+ struct lb_pld_smram_descriptor_block *BlSmramInfo;
+ EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *PldSmramHob;
+ struct lb_pld_spi_flash_info *BlSpiFlashInfo;
+ SPI_FLASH_INFO *PldSpiFlashInfo;
+ EFI_PHYSICAL_ADDRESS SmmStoreFmapRegionAddress;
+ UINT32 SmmStoreFmapRegionSize;
+ EFI_STATUS Status;
+ NV_VARIABLE_INFO *PldNvVariableInfo;
+ struct lb_pld_s3_communication *BlS3Communication;
+ PLD_S3_COMMUNICATION *PldS3Communication;
+
+ BlSmmRegisters = FindCbTag (CB_TAG_PLD_SMM_REGISTER_INFO);
+ if (BlSmmRegisters != NULL) {
+ PldSmmRegisters = BuildGuidHob (
+ &gSmmRegisterInfoGuid,
+ sizeof (PLD_SMM_REGISTERS) + (BlSmmRegisters->count * sizeof (PLD_GENERIC_REGISTER))
+ );
+ if (PldSmmRegisters != NULL) {
+ PldSmmRegisters->Revision = BlSmmRegisters->revision;
+
+ PldSmmRegisters->Count = BlSmmRegisters->count;
+ for (Index = 0; Index < BlSmmRegisters->count; Index++) {
+ PldSmmRegisters->Registers[Index].Id = BlSmmRegisters->registers[Index].register_id;
+ PldSmmRegisters->Registers[Index].Address.AddressSpaceId = BlSmmRegisters->registers[Index].address_space_id;
+ PldSmmRegisters->Registers[Index].Address.RegisterBitWidth = BlSmmRegisters->registers[Index].register_bit_width;
+ PldSmmRegisters->Registers[Index].Address.RegisterBitOffset = BlSmmRegisters->registers[Index].register_bit_offset;
+ PldSmmRegisters->Registers[Index].Value = BlSmmRegisters->registers[Index].value;
+ PldSmmRegisters->Registers[Index].Address.Address = cb_unpack64 (BlSmmRegisters->registers[Index].address);
+
+ // Required for UefiPayload implementation compatibility
+ PldSmmRegisters->Registers[Index].Address.AccessSize = EFI_ACPI_3_0_DWORD;
+ }
+
+ DEBUG ((DEBUG_INFO, "Create SMM register info guid hob\n"));
+ }
+ }
+
+ BlSmramInfo = FindCbTag (CB_TAG_PLD_SMM_SMRAM);
+ if (BlSmramInfo != NULL) {
+ PldSmramHob = BuildGuidHob (
+ &gEfiSmmSmramMemoryGuid,
+ sizeof (EFI_SMRAM_HOB_DESCRIPTOR_BLOCK) + ((BlSmramInfo->number_of_smm_regions - 1) * sizeof (EFI_SMRAM_DESCRIPTOR))
+ );
+ if (PldSmramHob != NULL) {
+ PldSmramHob->NumberOfSmmReservedRegions = BlSmramInfo->number_of_smm_regions;
+ for (Index = 0; Index < BlSmramInfo->number_of_smm_regions; Index++) {
+ PldSmramHob->Descriptor[Index].PhysicalStart = cb_unpack64 (BlSmramInfo->descriptor[Index].physical_start);
+ PldSmramHob->Descriptor[Index].CpuStart = cb_unpack64 (BlSmramInfo->descriptor[Index].physical_start);
+ PldSmramHob->Descriptor[Index].PhysicalSize = cb_unpack64 (BlSmramInfo->descriptor[Index].physical_size);
+ PldSmramHob->Descriptor[Index].RegionState = cb_unpack64 (BlSmramInfo->descriptor[Index].region_state);
+ }
+
+ DEBUG ((DEBUG_INFO, "Create SMRAM memory info guid hob\n"));
+ }
+ }
+
+ BlSpiFlashInfo = FindCbTag (CB_TAG_PLD_SPI_FLASH_INFO);
+ if (BlSpiFlashInfo != NULL) {
+ PldSpiFlashInfo = BuildGuidHob (
+ &gSpiFlashInfoGuid,
+ sizeof (SPI_FLASH_INFO)
+ );
+ if (PldSpiFlashInfo != NULL) {
+ PldSpiFlashInfo->Revision = BlSpiFlashInfo->revision;
+ PldSpiFlashInfo->Flags = BlSpiFlashInfo->flags;
+
+ PldSpiFlashInfo->SpiAddress.AddressSpaceId = BlSpiFlashInfo->spi_address.address_space_id;
+ PldSpiFlashInfo->SpiAddress.RegisterBitWidth = BlSpiFlashInfo->spi_address.register_bit_width;
+ PldSpiFlashInfo->SpiAddress.RegisterBitOffset = BlSpiFlashInfo->spi_address.register_bit_offset;
+ PldSpiFlashInfo->SpiAddress.Address = cb_unpack64 (BlSpiFlashInfo->spi_address.address);
+
+ // Required for UefiPayload implementation compatibility
+ PldSpiFlashInfo->SpiAddress.AccessSize = EFI_ACPI_3_0_DWORD;
+
+ DEBUG ((DEBUG_INFO, "Create SPI flash info guid hob\n"));
+ }
+ }
+
+ Status = FmapLocateArea ("SMMSTORE", &SmmStoreFmapRegionAddress, &SmmStoreFmapRegionSize);
+ if (!EFI_ERROR (Status)) {
+ PldNvVariableInfo = BuildGuidHob (
+ &gNvVariableInfoGuid,
+ sizeof (NV_VARIABLE_INFO)
+ );
+ if (PldNvVariableInfo != NULL) {
+ PldNvVariableInfo->Revision = 0;
+ PldNvVariableInfo->VariableStoreBase = (UINT32)SmmStoreFmapRegionAddress;
+ PldNvVariableInfo->VariableStoreSize = SmmStoreFmapRegionSize;
+
+ DEBUG ((DEBUG_INFO, "Create NV variable info guid hob\n"));
+ }
+ }
+
+ BlS3Communication = FindCbTag (CB_TAG_PLD_S3_COMMUNICATION);
+ if (BlS3Communication != NULL) {
+ PldS3Communication = BuildGuidHob (
+ &gS3CommunicationGuid,
+ sizeof (PLD_S3_COMMUNICATION)
+ );
+ if (PldS3Communication != NULL) {
+ PldS3Communication->CommBuffer.PhysicalStart = cb_unpack64 (BlS3Communication->comm_buffer.physical_start);
+ PldS3Communication->CommBuffer.CpuStart = cb_unpack64 (BlS3Communication->comm_buffer.physical_start);
+ PldS3Communication->CommBuffer.PhysicalSize = cb_unpack64 (BlS3Communication->comm_buffer.physical_size);
+ PldS3Communication->PldAcpiS3Enable = BlS3Communication->pld_acpi_s3_enable;
+
+ DEBUG ((DEBUG_INFO, "Create S3 communication info guid hob\n"));
+ }
+ }
+
return RETURN_SUCCESS;
}
diff --git a/UefiPayloadPkg/Library/CbParseLib/CbParseLib.inf b/UefiPayloadPkg/Library/CbParseLib/CbParseLib.inf
index cf81697703cc..306b7ae38fe8 100644
--- a/UefiPayloadPkg/Library/CbParseLib/CbParseLib.inf
+++ b/UefiPayloadPkg/Library/CbParseLib/CbParseLib.inf
@@ -34,6 +34,15 @@
IoLib
DebugLib
PcdLib
+ HobLib
+ FmapParserLib
+
+[Guids]
+ gSmmRegisterInfoGuid
+ gEfiSmmSmramMemoryGuid
+ gSpiFlashInfoGuid
+ gNvVariableInfoGuid
+ gS3CommunicationGuid
[Pcd]
gUefiPayloadPkgTokenSpaceGuid.PcdBootloaderParameter
--
2.43.0
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next prev parent reply other threads:[~2023-12-11 22:39 UTC|newest]
Thread overview: 4+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-11 22:39 [edk2-devel] [PATCH v2 1/4] UefiPayloadPkg/SblParseLib: Build SMM feature GUID HOBs from bootloader Benjamin Doron
2023-12-11 22:39 ` [edk2-devel] [PATCH v2 2/4] UefiPayloadPkg: Introduce coreboot FMAP parser library Benjamin Doron
2023-12-11 22:39 ` Benjamin Doron [this message]
2023-12-11 22:39 ` [edk2-devel] [PATCH v2 4/4] [WIP] UefiPayloadPkg: Support SMRAMC register Benjamin Doron
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