From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id 0C1DF74003C for ; Mon, 11 Dec 2023 22:39:31 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=73g8mnpxisYJid6cLeJ0UjVT52JxEn9k+/ke6IV3D4M=; c=relaxed/simple; d=groups.io; h=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Transfer-Encoding; s=20140610; t=1702334370; v=1; b=Ea6pt1dcst0gE7Fa9daJNtAbGgoG3gvf1mA2/fnG4FQJDOgutT5/D5ysJgentByGXwtu45Mv uGdhJ3mPlJQ+qKEaOrTFaAIQz/7EvookMxfcu+0LI5Eb9HCpcEKaSKhRKj6P+KinfMtJadUa6AW 6vM1uK03Y0Npu8H+J1XkGJsA= X-Received: by 127.0.0.2 with SMTP id WMuoYY7687511xQAoyGo3dtB; Mon, 11 Dec 2023 14:39:30 -0800 X-Received: from mail-qv1-f47.google.com (mail-qv1-f47.google.com [209.85.219.47]) by mx.groups.io with SMTP id smtpd.web10.5355.1702334370080569728 for ; Mon, 11 Dec 2023 14:39:30 -0800 X-Received: by mail-qv1-f47.google.com with SMTP id 6a1803df08f44-67a948922aaso33188426d6.3 for ; Mon, 11 Dec 2023 14:39:29 -0800 (PST) X-Gm-Message-State: IWmTvh8RC1ESzZM09aAwHybIx7686176AA= X-Google-Smtp-Source: AGHT+IFY7vQcmctk3Z83yGvzaNnfAKc3kNhADw6b/yJi1H3ZW6zE0kYxdEOPFGlixY+0Og+ij2380w== X-Received: by 2002:a05:6214:304:b0:67e:aa1a:f969 with SMTP id i4-20020a056214030400b0067eaa1af969mr6109084qvu.58.1702334369009; Mon, 11 Dec 2023 14:39:29 -0800 (PST) X-Received: from aturtleortwo-benjamindomain.. ([2607:f2c0:e9b1:f59a:bf3c:db4:6459:ea26]) by smtp.gmail.com with ESMTPSA id l7-20020a0cc207000000b0067aa8e67fc5sm3619070qvh.84.2023.12.11.14.39.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 11 Dec 2023 14:39:28 -0800 (PST) From: "Benjamin Doron" To: devel@edk2.groups.io Cc: Guo Dong , Ray Ni , Sean Rhodes , James Lu , Gua Guo Subject: [edk2-devel] [PATCH v2 3/4] [WIP] UefiPayloadPkg/CbParseLib: Initial coreboot support for SMM payload Date: Mon, 11 Dec 2023 17:39:11 -0500 Message-ID: <20231211223919.1225565-3-benjamin.doron00@gmail.com> In-Reply-To: <20231211223919.1225565-1-benjamin.doron00@gmail.com> References: <20231211223919.1225565-1-benjamin.doron00@gmail.com> MIME-Version: 1.0 Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,benjamin.doron00@gmail.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: Content-Transfer-Encoding: quoted-printable X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=Ea6pt1dc; dmarc=fail reason="SPF not aligned (relaxed), DKIM not aligned (relaxed)" header.from=gmail.com (policy=none); spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io From: Benjamin Doron To be used with the https://review.coreboot.org/c/coreboot/+/70378 patch-series. Now feature complete, awaiting final upstream feedback whether generating some data inside coreboot is okay. Cc: Guo Dong Cc: Ray Ni Cc: Sean Rhodes Cc: James Lu Cc: Gua Guo Signed-off-by: Benjamin Doron --- UefiPayloadPkg/Include/Coreboot.h | 50 ++++++++ UefiPayloadPkg/Library/CbParseLib/CbParseLib.c | 121 +++++++++++++++++++- UefiPayloadPkg/Library/CbParseLib/CbParseLib.inf | 9 ++ 3 files changed, 179 insertions(+), 1 deletion(-) diff --git a/UefiPayloadPkg/Include/Coreboot.h b/UefiPayloadPkg/Include/Cor= eboot.h index 6c33dda9ef85..add64d9623d9 100644 --- a/UefiPayloadPkg/Include/Coreboot.h +++ b/UefiPayloadPkg/Include/Coreboot.h @@ -270,6 +270,56 @@ struct fmap { struct fmap_area areas[];=0D } __attribute__ ((packed));=0D =0D +#define CB_TAG_PLD_SMM_REGISTER_INFO 0x0050=0D +struct lb_pld_generic_register {=0D + UINT8 register_id;=0D + UINT8 address_space_id;=0D + UINT8 register_bit_width;=0D + UINT8 register_bit_offset;=0D + UINT32 value;=0D + struct cbuint64 address;=0D +};=0D +=0D +struct lb_pld_smm_registers {=0D + UINT32 tag;=0D + UINT32 size;=0D + UINT32 revision;=0D + UINT32 count;=0D + struct lb_pld_generic_register registers[];=0D +};=0D +=0D +#define CB_TAG_PLD_SMM_SMRAM 0x0051=0D +struct lb_pld_smram_descriptor {=0D + struct cbuint64 physical_start;=0D + struct cbuint64 physical_size;=0D + struct cbuint64 region_state;=0D +};=0D +=0D +struct lb_pld_smram_descriptor_block {=0D + UINT32 tag;=0D + UINT32 size;=0D + UINT32 number_of_smm_regions;=0D + struct lb_pld_smram_descriptor descriptor[1];=0D +};=0D +=0D +#define CB_TAG_PLD_SPI_FLASH_INFO 0x0052=0D +struct lb_pld_spi_flash_info {=0D + UINT32 tag;=0D + UINT32 size;=0D + UINT16 revision;=0D + UINT16 flags;=0D + struct lb_pld_generic_register spi_address;=0D +};=0D +=0D +#define CB_TAG_PLD_S3_COMMUNICATION 0x0054=0D +struct lb_pld_s3_communication {=0D + UINT32 tag;=0D + UINT32 size;=0D + struct lb_pld_smram_descriptor comm_buffer;=0D + UINT8 pld_acpi_s3_enable;=0D + UINT8 pad[3];=0D +};=0D +=0D /* Helpful macros */=0D =0D #define MEM_RANGE_COUNT(_rec) \=0D diff --git a/UefiPayloadPkg/Library/CbParseLib/CbParseLib.c b/UefiPayloadPk= g/Library/CbParseLib/CbParseLib.c index 8a353f77f635..46b164231fe5 100644 --- a/UefiPayloadPkg/Library/CbParseLib/CbParseLib.c +++ b/UefiPayloadPkg/Library/CbParseLib/CbParseLib.c @@ -7,15 +7,22 @@ =0D **/=0D =0D -#include =0D +#include =0D #include =0D #include =0D #include =0D #include =0D #include =0D +#include =0D #include =0D +#include =0D #include =0D #include =0D +#include =0D +#include =0D +#include =0D +#include =0D +#include =0D =0D /**=0D Convert a packed value from cbuint64 to a UINT64 value.=0D @@ -602,5 +609,117 @@ ParseMiscInfo ( VOID=0D )=0D {=0D + struct lb_pld_smm_registers *BlSmmRegisters;=0D + PLD_SMM_REGISTERS *PldSmmRegisters;=0D + UINTN Index;=0D + struct lb_pld_smram_descriptor_block *BlSmramInfo;=0D + EFI_SMRAM_HOB_DESCRIPTOR_BLOCK *PldSmramHob;=0D + struct lb_pld_spi_flash_info *BlSpiFlashInfo;=0D + SPI_FLASH_INFO *PldSpiFlashInfo;=0D + EFI_PHYSICAL_ADDRESS SmmStoreFmapRegionAddress;=0D + UINT32 SmmStoreFmapRegionSize;=0D + EFI_STATUS Status;=0D + NV_VARIABLE_INFO *PldNvVariableInfo;=0D + struct lb_pld_s3_communication *BlS3Communication;=0D + PLD_S3_COMMUNICATION *PldS3Communication;=0D +=0D + BlSmmRegisters =3D FindCbTag (CB_TAG_PLD_SMM_REGISTER_INFO);=0D + if (BlSmmRegisters !=3D NULL) {=0D + PldSmmRegisters =3D BuildGuidHob (=0D + &gSmmRegisterInfoGuid,=0D + sizeof (PLD_SMM_REGISTERS) + (BlSmmRegisters->coun= t * sizeof (PLD_GENERIC_REGISTER))=0D + );=0D + if (PldSmmRegisters !=3D NULL) {=0D + PldSmmRegisters->Revision =3D BlSmmRegisters->revision;=0D +=0D + PldSmmRegisters->Count =3D BlSmmRegisters->count;=0D + for (Index =3D 0; Index < BlSmmRegisters->count; Index++) {=0D + PldSmmRegisters->Registers[Index].Id =3D BlSmmRegisters->registers= [Index].register_id;=0D + PldSmmRegisters->Registers[Index].Address.AddressSpaceId =3D BlSmm= Registers->registers[Index].address_space_id;=0D + PldSmmRegisters->Registers[Index].Address.RegisterBitWidth =3D BlS= mmRegisters->registers[Index].register_bit_width;=0D + PldSmmRegisters->Registers[Index].Address.RegisterBitOffset =3D Bl= SmmRegisters->registers[Index].register_bit_offset;=0D + PldSmmRegisters->Registers[Index].Value =3D BlSmmRegisters->regist= ers[Index].value;=0D + PldSmmRegisters->Registers[Index].Address.Address =3D cb_unpack64 = (BlSmmRegisters->registers[Index].address);=0D +=0D + // Required for UefiPayload implementation compatibility=0D + PldSmmRegisters->Registers[Index].Address.AccessSize =3D EFI_ACPI_= 3_0_DWORD;=0D + }=0D +=0D + DEBUG ((DEBUG_INFO, "Create SMM register info guid hob\n"));=0D + }=0D + }=0D +=0D + BlSmramInfo =3D FindCbTag (CB_TAG_PLD_SMM_SMRAM);=0D + if (BlSmramInfo !=3D NULL) {=0D + PldSmramHob =3D BuildGuidHob (=0D + &gEfiSmmSmramMemoryGuid,=0D + sizeof (EFI_SMRAM_HOB_DESCRIPTOR_BLOCK) + ((BlSmramInf= o->number_of_smm_regions - 1) * sizeof (EFI_SMRAM_DESCRIPTOR))=0D + );=0D + if (PldSmramHob !=3D NULL) {=0D + PldSmramHob->NumberOfSmmReservedRegions =3D BlSmramInfo->number_of_s= mm_regions;=0D + for (Index =3D 0; Index < BlSmramInfo->number_of_smm_regions; Index+= +) {=0D + PldSmramHob->Descriptor[Index].PhysicalStart =3D cb_unpack64 (BlSm= ramInfo->descriptor[Index].physical_start);=0D + PldSmramHob->Descriptor[Index].CpuStart =3D cb_unpack64 (BlSmramIn= fo->descriptor[Index].physical_start);=0D + PldSmramHob->Descriptor[Index].PhysicalSize =3D cb_unpack64 (BlSmr= amInfo->descriptor[Index].physical_size);=0D + PldSmramHob->Descriptor[Index].RegionState =3D cb_unpack64 (BlSmra= mInfo->descriptor[Index].region_state);=0D + }=0D +=0D + DEBUG ((DEBUG_INFO, "Create SMRAM memory info guid hob\n"));=0D + }=0D + }=0D +=0D + BlSpiFlashInfo =3D FindCbTag (CB_TAG_PLD_SPI_FLASH_INFO);=0D + if (BlSpiFlashInfo !=3D NULL) {=0D + PldSpiFlashInfo =3D BuildGuidHob (=0D + &gSpiFlashInfoGuid,=0D + sizeof (SPI_FLASH_INFO)=0D + );=0D + if (PldSpiFlashInfo !=3D NULL) {=0D + PldSpiFlashInfo->Revision =3D BlSpiFlashInfo->revision;=0D + PldSpiFlashInfo->Flags =3D BlSpiFlashInfo->flags;=0D +=0D + PldSpiFlashInfo->SpiAddress.AddressSpaceId =3D BlSpiFlashInfo->spi_a= ddress.address_space_id;=0D + PldSpiFlashInfo->SpiAddress.RegisterBitWidth =3D BlSpiFlashInfo->spi= _address.register_bit_width;=0D + PldSpiFlashInfo->SpiAddress.RegisterBitOffset =3D BlSpiFlashInfo->sp= i_address.register_bit_offset;=0D + PldSpiFlashInfo->SpiAddress.Address =3D cb_unpack64 (BlSpiFlashInfo-= >spi_address.address);=0D +=0D + // Required for UefiPayload implementation compatibility=0D + PldSpiFlashInfo->SpiAddress.AccessSize =3D EFI_ACPI_3_0_DWORD;=0D +=0D + DEBUG ((DEBUG_INFO, "Create SPI flash info guid hob\n"));=0D + }=0D + }=0D +=0D + Status =3D FmapLocateArea ("SMMSTORE", &SmmStoreFmapRegionAddress, &SmmS= toreFmapRegionSize);=0D + if (!EFI_ERROR (Status)) {=0D + PldNvVariableInfo =3D BuildGuidHob (=0D + &gNvVariableInfoGuid,=0D + sizeof (NV_VARIABLE_INFO)=0D + );=0D + if (PldNvVariableInfo !=3D NULL) {=0D + PldNvVariableInfo->Revision =3D 0;=0D + PldNvVariableInfo->VariableStoreBase =3D (UINT32)SmmStoreFmapRegionA= ddress;=0D + PldNvVariableInfo->VariableStoreSize =3D SmmStoreFmapRegionSize;=0D +=0D + DEBUG ((DEBUG_INFO, "Create NV variable info guid hob\n"));=0D + }=0D + }=0D +=0D + BlS3Communication =3D FindCbTag (CB_TAG_PLD_S3_COMMUNICATION);=0D + if (BlS3Communication !=3D NULL) {=0D + PldS3Communication =3D BuildGuidHob (=0D + &gS3CommunicationGuid,=0D + sizeof (PLD_S3_COMMUNICATION)=0D + );=0D + if (PldS3Communication !=3D NULL) {=0D + PldS3Communication->CommBuffer.PhysicalStart =3D cb_unpack64 (BlS3Co= mmunication->comm_buffer.physical_start);=0D + PldS3Communication->CommBuffer.CpuStart =3D cb_unpack64 (BlS3Communi= cation->comm_buffer.physical_start);=0D + PldS3Communication->CommBuffer.PhysicalSize =3D cb_unpack64 (BlS3Com= munication->comm_buffer.physical_size);=0D + PldS3Communication->PldAcpiS3Enable =3D BlS3Communication->pld_acpi_= s3_enable;=0D +=0D + DEBUG ((DEBUG_INFO, "Create S3 communication info guid hob\n"));=0D + }=0D + }=0D +=0D return RETURN_SUCCESS;=0D }=0D diff --git a/UefiPayloadPkg/Library/CbParseLib/CbParseLib.inf b/UefiPayload= Pkg/Library/CbParseLib/CbParseLib.inf index cf81697703cc..306b7ae38fe8 100644 --- a/UefiPayloadPkg/Library/CbParseLib/CbParseLib.inf +++ b/UefiPayloadPkg/Library/CbParseLib/CbParseLib.inf @@ -34,6 +34,15 @@ IoLib=0D DebugLib=0D PcdLib=0D + HobLib=0D + FmapParserLib=0D +=0D +[Guids]=0D + gSmmRegisterInfoGuid=0D + gEfiSmmSmramMemoryGuid=0D + gSpiFlashInfoGuid=0D + gNvVariableInfoGuid=0D + gS3CommunicationGuid=0D =0D [Pcd]=0D gUefiPayloadPkgTokenSpaceGuid.PcdBootloaderParameter=0D --=20 2.43.0 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#112338): https://edk2.groups.io/g/devel/message/112338 Mute This Topic: https://groups.io/mt/103119571/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=-=-=-=-=-=-=-=-=-=-=-