From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id 75190D81194 for ; Tue, 12 Dec 2023 13:11:49 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=0OjgtmcMmczDxJO02BvI4rywn4US4QXwbzRGf7W/xeY=; c=relaxed/simple; d=groups.io; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Transfer-Encoding; s=20140610; t=1702386708; v=1; b=OWGZzfoMzt1gN+cEMSljt47AbsGPTV3N7RgPd7kj6zTvjh84HBl+Gj/qY7+n34rrSq7R3r3n 8RXuvwsbN5dUPmujLERBFG0XVovJZa1MgS7q2owN6j011KDoo+mLlSyu2cJ98hd2y3j3BnTX90A j9nLpzJs1feEBhZ+wCVXZZBk= X-Received: by 127.0.0.2 with SMTP id pzd5YY7687511xEO9zY5tpYv; Tue, 12 Dec 2023 05:11:48 -0800 X-Received: from mail.loongson.cn (mail.loongson.cn [114.242.206.163]) by mx.groups.io with SMTP id smtpd.web11.1189.1702386707017083499 for ; Tue, 12 Dec 2023 05:11:47 -0800 X-Received: from loongson.cn (unknown [10.2.9.245]) by gateway (Coremail) with SMTP id _____8DxS+kQXHhlalkAAA--.2160S3; Tue, 12 Dec 2023 21:11:44 +0800 (CST) X-Received: from code-server.gen (unknown [10.2.9.245]) by localhost.localdomain (Coremail) with SMTP id AQAAf8Ax_OAQXHhlj6MAAA--.4336S2; Tue, 12 Dec 2023 21:11:44 +0800 (CST) From: "Chao Li" To: devel@edk2.groups.io Cc: Michael D Kinney , Liming Gao , Zhiguang Liu , Bibo Mao Subject: [edk2-devel] [PATCH v4 07/37] MdePkg: Add CSR operation for LoongArch Date: Tue, 12 Dec 2023 21:11:42 +0800 Message-Id: <20231212131142.2470483-1-lichao@loongson.cn> In-Reply-To: <20231212130932.2467028-1-lichao@loongson.cn> References: <20231212130932.2467028-1-lichao@loongson.cn> MIME-Version: 1.0 X-CM-TRANSID: AQAAf8Ax_OAQXHhlj6MAAA--.4336S2 X-CM-SenderInfo: xolfxt3r6o00pqjv00gofq/1tbiAQADCGV3wy0H6gAMsX X-Coremail-Antispam: 1Uk129KBjDUn29KB7ZKAUJUUUUU529EdanIXcx71UUUUU7KY7 ZEXasCq-sGcSsGvfJ3UbIjqfuFe4nvWSU5nxnvy29KBjDU0xBIdaVrnUUvcSsGvfC2Kfnx nUUI43ZEXa7xR_UUUUUUUUU== Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,lichao@loongson.cn List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: X-Gm-Message-State: iLJx6XOGIqbE4Eq5WBRHEudFx7686176AA= Content-Transfer-Encoding: 8bit X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=OWGZzfoM; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io; dmarc=none Add CsrRead, CsrWrite and CsrXChg functions for LoongArch, and use them to operate the CSR register of LoongArch architecture. BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584 Cc: Michael D Kinney Cc: Liming Gao Cc: Zhiguang Liu Signed-off-by: Chao Li Co-authored-by: Bibo Mao Acked-by: Michael D Kinney --- MdePkg/Include/Library/BaseLib.h | 45 +++ MdePkg/Library/BaseLib/BaseLib.inf | 2 + MdePkg/Library/BaseLib/LoongArch64/AsmCsr.S | 422 ++++++++++++++++++++ MdePkg/Library/BaseLib/LoongArch64/Csr.c | 81 ++++ 4 files changed, 550 insertions(+) create mode 100644 MdePkg/Library/BaseLib/LoongArch64/AsmCsr.S create mode 100644 MdePkg/Library/BaseLib/LoongArch64/Csr.c diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/BaseLib.h index 55d53c75a0..234f3065c2 100644 --- a/MdePkg/Include/Library/BaseLib.h +++ b/MdePkg/Include/Library/BaseLib.h @@ -293,6 +293,51 @@ AsmReadStableCounter ( VOID ); +/** + CSR read operation. + + @param[in] Select CSR read instruction select values. + + @return The return value of csrrd instruction, return -1 means no CSR instruction + is found. +**/ +UINTN +CsrRead ( + IN UINT16 Select + ); + +/** + CSR write operation. + + @param[in] Select CSR write instruction select values. + @param[in] Value The csrwr will write the value. + + @return The return value of csrwr instruction, that is, store the old value of + the register, return -1 means no CSR instruction is found. +**/ +UINTN +CsrWrite ( + IN UINT16 Select, + IN UINTN Value + ); + +/** + CSR exchange operation. + + @param[in] Select CSR exchange instruction select values. + @param[in] Value The csrxchg will write the value. + @param[in] Mask The csrxchg mask value. + + @return The return value of csrxchg instruction, that is, store the old value of + the register, return -1 means no CSR instruction is found. +**/ +UINTN +CsrXChg ( + IN UINT16 Select, + IN UINTN Value, + IN UINTN Mask + ); + #endif // defined (MDE_CPU_LOONGARCH64) // diff --git a/MdePkg/Library/BaseLib/BaseLib.inf b/MdePkg/Library/BaseLib/BaseLib.inf index aaf221822b..74a323c798 100644 --- a/MdePkg/Library/BaseLib/BaseLib.inf +++ b/MdePkg/Library/BaseLib/BaseLib.inf @@ -409,7 +409,9 @@ [Sources.LOONGARCH64] Math64.c Unaligned.c + LoongArch64/Csr.c LoongArch64/InternalSwitchStack.c + LoongArch64/AsmCsr.S | GCC LoongArch64/GetInterruptState.S | GCC LoongArch64/EnableInterrupts.S | GCC LoongArch64/DisableInterrupts.S | GCC diff --git a/MdePkg/Library/BaseLib/LoongArch64/AsmCsr.S b/MdePkg/Library/BaseLib/LoongArch64/AsmCsr.S new file mode 100644 index 0000000000..c7453934c6 --- /dev/null +++ b/MdePkg/Library/BaseLib/LoongArch64/AsmCsr.S @@ -0,0 +1,422 @@ +#------------------------------------------------------------------------------ +# +# LoongArch ASM CSR operation functions +# +# Copyright (c) 2023, Loongson Technology Corporation Limited. All rights reserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +#------------------------------------------------------------------------------ + +#include + +ASM_GLOBAL ASM_PFX (AsmCsrRead) +ASM_GLOBAL ASM_PFX (AsmCsrWrite) +ASM_GLOBAL ASM_PFX (AsmCsrXChg) + +.macro AsmCsrRd Sel + csrrd $a0, \Sel + jirl $zero, $ra, 0 +.endm + +.macro AsmCsrWr Sel + csrwr $a0, \Sel + jirl $zero, $ra, 0 +.endm + +.macro AsmCsrXChange Sel + csrxchg $a0, $a1, \Sel + jirl $zero, $ra, 0 +.endm + +ASM_PFX(AsmCsrRead): + blt $a0, $zero, ReadSelNumErr + li.w $t0, LOONGARCH_CSR_EBASE + bltu $t0, $a0, TlbCsrRd + +BasicCsrRd: + la.pcrel $t0, BasicCsrRead + alsl.d $t0, $a0, $t0, 3 + jirl $zero, $t0, 0 + +TlbCsrRd: + li.w $t0, LOONGARCH_CSR_TLBIDX + bltu $a0, $t0, ReadSelNumErr + li.w $t0, LOONGARCH_CSR_RVACFG + bltu $t0, $a0, CfgCsrRd + la.pcrel $t0, TlbCsrRead + addi.w $t1, $a0, -LOONGARCH_CSR_TLBIDX + alsl.d $t0, $t1, $t0, 3 + jirl $zero, $t0, 0 + +CfgCsrRd: + li.w $t0, LOONGARCH_CSR_CPUNUM + bltu $a0, $t0, ReadSelNumErr + li.w $t0, LOONGARCH_CSR_PRCFG3 + bltu $t0, $a0, KcsCsrRd + la.pcrel $t0, CfgCsrRead + addi.w $t1, $a0, -LOONGARCH_CSR_CPUNUM + alsl.d $t0, $t1, $t0, 3 + jirl $zero, $t0, 0 + +KcsCsrRd: + li.w $t0, LOONGARCH_CSR_KS0 + bltu $a0, $t0, ReadSelNumErr + li.w $t0, LOONGARCH_CSR_KS8 + bltu $t0, $a0, StableTimerCsrRd + la.pcrel $t0, KcsCsrRead + addi.w $t1, $a0, -LOONGARCH_CSR_KS0 + alsl.d $t0, $t1, $t0, 3 + jirl $zero, $t0, 0 + +StableTimerCsrRd: + li.w $t0, LOONGARCH_CSR_TMID + bltu $a0, $t0, ReadSelNumErr + li.w $t0, LOONGARCH_CSR_TINTCLR + bltu $t0, $a0, TlbRefillCsrRd + la.pcrel $t0, StableTimerCsrRead + addi.w $t1, $a0, -LOONGARCH_CSR_TMID + alsl.d $t0, $t1, $t0, 3 + jirl $zero, $t0, 0 + +TlbRefillCsrRd: + li.w $t0, LOONGARCH_CSR_TLBREBASE + bltu $a0, $t0, ReadSelNumErr + li.w $t0, LOONGARCH_CSR_TLBREHI + bltu $t0, $a0, DirMapCsrRd + la.pcrel $t0, TlbRefillCsrRead + addi.w $t1, $a0, -LOONGARCH_CSR_TLBREBASE + alsl.d $t0, $t1, $t0, 3 + jirl $zero, $t0, 0 + +DirMapCsrRd: + li.w $t0, LOONGARCH_CSR_DMWIN0 + bltu $a0, $t0, ReadSelNumErr + li.w $t0, LOONGARCH_CSR_DMWIN3 + bltu $t0, $a0, ReadSelNumErr + la.pcrel $t0, DirMapCsrRead + addi.w $t1, $a0, -LOONGARCH_CSR_DMWIN0 + alsl.d $t0, $t1, $t0, 3 + jirl $zero, $t0, 0 + +ReadSelNumErr: + addi.d $a0, $zero, -1 + jirl $zero, $ra, 0 + +BasicCsrRead: + CsrSel = LOONGARCH_CSR_CRMD + .rept LOONGARCH_CSR_EBASE - LOONGARCH_CSR_CRMD + 1 + AsmCsrRd CsrSel + CsrSel = CsrSel + 1 + .endr + +TlbCsrRead: + CsrSel = LOONGARCH_CSR_TLBIDX + .rept LOONGARCH_CSR_RVACFG - LOONGARCH_CSR_TLBIDX + 1 + AsmCsrRd CsrSel + CsrSel = CsrSel + 1 + .endr + +CfgCsrRead: + CsrSel = LOONGARCH_CSR_CPUNUM + .rept LOONGARCH_CSR_PRCFG3 - LOONGARCH_CSR_CPUNUM + 1 + AsmCsrRd CsrSel + CsrSel = CsrSel + 1 + .endr + +KcsCsrRead: + CsrSel = LOONGARCH_CSR_KS0 + .rept LOONGARCH_CSR_KS8 - LOONGARCH_CSR_KS0 + 1 + AsmCsrRd CsrSel + CsrSel = CsrSel + 1 + .endr + +StableTimerCsrRead: + CsrSel = LOONGARCH_CSR_TMID + .rept LOONGARCH_CSR_TINTCLR - LOONGARCH_CSR_TMID + 1 + AsmCsrRd CsrSel + CsrSel = CsrSel + 1 + .endr + +TlbRefillCsrRead: + CsrSel = LOONGARCH_CSR_TLBREBASE + .rept LOONGARCH_CSR_TLBREHI - LOONGARCH_CSR_TLBREBASE + 1 + AsmCsrRd CsrSel + CsrSel = CsrSel + 1 + .endr + +DirMapCsrRead: + CsrSel = LOONGARCH_CSR_DMWIN0 + .rept LOONGARCH_CSR_DMWIN3 - LOONGARCH_CSR_DMWIN0 + 1 + AsmCsrRd CsrSel + CsrSel = CsrSel + 1 + .endr + +ASM_PFX(AsmCsrWrite): + blt $a0, $zero, WriteSelNumErr + li.w $t0, LOONGARCH_CSR_EBASE + bltu $t0, $a0, TlbCsrWr + +BasicCsrWr: + la.pcrel $t0, BasicCsrWrite + alsl.d $t0, $a0, $t0, 3 + move $a0, $a1 + jirl $zero, $t0, 0 + +TlbCsrWr: + li.w $t0, LOONGARCH_CSR_TLBIDX + bltu $a0, $t0, WriteSelNumErr + li.w $t0, LOONGARCH_CSR_RVACFG + bltu $t0, $a0, CfgCsrWr + la.pcrel $t0, TlbCsrWrite + addi.w $t1, $a0, -LOONGARCH_CSR_TLBIDX + alsl.d $t0, $t1, $t0, 3 + move $a0, $a1 + jirl $zero, $t0, 0 + +CfgCsrWr: + li.w $t0, LOONGARCH_CSR_CPUNUM + bltu $a0, $t0, WriteSelNumErr + li.w $t0, LOONGARCH_CSR_PRCFG3 + bltu $t0, $a0, KcsCsrWr + la.pcrel $t0, CfgCsrWrite + addi.w $t1, $a0, -LOONGARCH_CSR_CPUNUM + alsl.d $t0, $t1, $t0, 3 + move $a0, $a1 + jirl $zero, $t0, 0 + +KcsCsrWr: + li.w $t0, LOONGARCH_CSR_KS0 + bltu $a0, $t0, WriteSelNumErr + li.w $t0, LOONGARCH_CSR_KS8 + bltu $t0, $a0, StableTimerCsrWr + la.pcrel $t0, KcsCsrWrite + addi.w $t1, $a0, -LOONGARCH_CSR_KS0 + alsl.d $t0, $t1, $t0, 3 + move $a0, $a1 + jirl $zero, $t0, 0 + +StableTimerCsrWr: + li.w $t0, LOONGARCH_CSR_TMID + bltu $a0, $t0, WriteSelNumErr + li.w $t0, LOONGARCH_CSR_TINTCLR + bltu $t0, $a0, TlbRefillCsrWr + la.pcrel $t0, StableTimerCsrWrite + addi.w $t1, $a0, -LOONGARCH_CSR_TMID + alsl.d $t0, $t1, $t0, 3 + move $a0, $a1 + jirl $zero, $t0, 0 + +TlbRefillCsrWr: + li.w $t0, LOONGARCH_CSR_TLBREBASE + bltu $a0, $t0, WriteSelNumErr + li.w $t0, LOONGARCH_CSR_TLBREHI + bltu $t0, $a0, DirMapCsrWr + la.pcrel $t0, TlbRefillCsrWrite + addi.w $t1, $a0, -LOONGARCH_CSR_TLBREBASE + alsl.d $t0, $t1, $t0, 3 + move $a0, $a1 + jirl $zero, $t0, 0 + +DirMapCsrWr: + li.w $t0, LOONGARCH_CSR_DMWIN0 + bltu $a0, $t0, WriteSelNumErr + li.w $t0, LOONGARCH_CSR_DMWIN3 + bltu $t0, $a0, WriteSelNumErr + la.pcrel $t0, DirMapCsrWrite + addi.w $t1, $a0, -LOONGARCH_CSR_DMWIN0 + alsl.d $t0, $t1, $t0, 3 + move $a0, $a1 + jirl $zero, $t0, 0 + +WriteSelNumErr: + addi.d $a0, $zero, -1 + jirl $zero, $ra, 0 + +BasicCsrWrite: + CsrSel = LOONGARCH_CSR_CRMD + .rept LOONGARCH_CSR_EBASE - LOONGARCH_CSR_CRMD + 1 + AsmCsrWr CsrSel + CsrSel = CsrSel + 1 + .endr + +TlbCsrWrite: + CsrSel = LOONGARCH_CSR_TLBIDX + .rept LOONGARCH_CSR_RVACFG - LOONGARCH_CSR_TLBIDX + 1 + AsmCsrWr CsrSel + CsrSel = CsrSel + 1 + .endr + +CfgCsrWrite: + CsrSel = LOONGARCH_CSR_CPUNUM + .rept LOONGARCH_CSR_PRCFG3 - LOONGARCH_CSR_CPUNUM + 1 + AsmCsrWr CsrSel + CsrSel = CsrSel + 1 + .endr + +KcsCsrWrite: + CsrSel = LOONGARCH_CSR_KS0 + .rept LOONGARCH_CSR_KS8 - LOONGARCH_CSR_KS0 + 1 + AsmCsrWr CsrSel + CsrSel = CsrSel + 1 + .endr + +StableTimerCsrWrite: + CsrSel = LOONGARCH_CSR_TMID + .rept LOONGARCH_CSR_TINTCLR - LOONGARCH_CSR_TMID + 1 + AsmCsrWr CsrSel + CsrSel = CsrSel + 1 + .endr + +TlbRefillCsrWrite: + CsrSel = LOONGARCH_CSR_TLBREBASE + .rept LOONGARCH_CSR_TLBREHI - LOONGARCH_CSR_TLBREBASE + 1 + AsmCsrWr CsrSel + CsrSel = CsrSel + 1 + .endr + +DirMapCsrWrite: + CsrSel = LOONGARCH_CSR_DMWIN0 + .rept LOONGARCH_CSR_DMWIN3 - LOONGARCH_CSR_DMWIN0 + 1 + AsmCsrWr CsrSel + CsrSel = CsrSel + 1 + .endr + + +ASM_PFX(AsmCsrXChg): + blt $a0, $zero, XchgSelNumErr + li.w $t0, LOONGARCH_CSR_EBASE + bltu $t0, $a0, TlbCsrXchg + +BasicCsrXchg: + la.pcrel $t0, BasicCsrXchange + alsl.d $t0, $a0, $t0, 3 + move $a0, $a1 + move $a1, $a2 + jirl $zero, $t0, 0 + +TlbCsrXchg: + li.w $t0, LOONGARCH_CSR_TLBIDX + bltu $a0, $t0, XchgSelNumErr + li.w $t0, LOONGARCH_CSR_RVACFG + bltu $t0, $a0, CfgCsrXchg + la.pcrel $t0, TlbCsrXchange + addi.w $t1, $a0, -LOONGARCH_CSR_TLBIDX + alsl.d $t0, $t1, $t0, 3 + move $a0, $a1 + move $a1, $a2 + jirl $zero, $t0, 0 + +CfgCsrXchg: + li.w $t0, LOONGARCH_CSR_CPUNUM + bltu $a0, $t0, XchgSelNumErr + li.w $t0, LOONGARCH_CSR_PRCFG3 + bltu $t0, $a0, KcsCsrXchg + la.pcrel $t0, CfgCsrXchange + addi.w $t1, $a0, -LOONGARCH_CSR_CPUNUM + alsl.d $t0, $t1, $t0, 3 + move $a0, $a1 + move $a1, $a2 + jirl $zero, $t0, 0 + +KcsCsrXchg: + li.w $t0, LOONGARCH_CSR_KS0 + bltu $a0, $t0, XchgSelNumErr + li.w $t0, LOONGARCH_CSR_KS8 + bltu $t0, $a0, StableTimerCsrXchg + la.pcrel $t0, KcsCsrXchange + addi.w $t1, $a0, -LOONGARCH_CSR_KS0 + alsl.d $t0, $t1, $t0, 3 + move $a0, $a1 + move $a1, $a2 + jirl $zero, $t0, 0 + +StableTimerCsrXchg: + li.w $t0, LOONGARCH_CSR_TMID + bltu $a0, $t0, XchgSelNumErr + li.w $t0, LOONGARCH_CSR_TINTCLR + bltu $t0, $a0, TlbRefillCsrXchg + la.pcrel $t0, StableTimerCsrXchange + addi.w $t1, $a0, -LOONGARCH_CSR_TMID + alsl.d $t0, $t1, $t0, 3 + move $a0, $a1 + move $a1, $a2 + jirl $zero, $t0, 0 + +TlbRefillCsrXchg: + li.w $t0, LOONGARCH_CSR_TLBREBASE + bltu $a0, $t0, XchgSelNumErr + li.w $t0, LOONGARCH_CSR_TLBREHI + bltu $t0, $a0, DirMapCsrXchg + la.pcrel $t0, TlbRefillCsrXchange + addi.w $t1, $a0, -LOONGARCH_CSR_TLBREBASE + alsl.d $t0, $t1, $t0, 3 + move $a0, $a1 + move $a1, $a2 + jirl $zero, $t0, 0 + +DirMapCsrXchg: + li.w $t0, LOONGARCH_CSR_DMWIN0 + bltu $a0, $t0, XchgSelNumErr + li.w $t0, LOONGARCH_CSR_DMWIN3 + bltu $t0, $a0, XchgSelNumErr + la.pcrel $t0, DirMapCsrXchange + addi.w $t1, $a0, -LOONGARCH_CSR_DMWIN0 + alsl.d $t0, $t1, $t0, 3 + move $a0, $a1 + move $a1, $a2 + jirl $zero, $t0, 0 + +XchgSelNumErr: + addi.d $a0, $zero, -1 + jirl $zero, $ra, 0 + +BasicCsrXchange: + CsrSel = LOONGARCH_CSR_CRMD + .rept LOONGARCH_CSR_EBASE - LOONGARCH_CSR_CRMD + 1 + AsmCsrXChange CsrSel + CsrSel = CsrSel + 1 + .endr + +TlbCsrXchange: + CsrSel = LOONGARCH_CSR_TLBIDX + .rept LOONGARCH_CSR_RVACFG - LOONGARCH_CSR_TLBIDX + 1 + AsmCsrXChange CsrSel + CsrSel = CsrSel + 1 + .endr + +CfgCsrXchange: + CsrSel = LOONGARCH_CSR_CPUNUM + .rept LOONGARCH_CSR_PRCFG3 - LOONGARCH_CSR_CPUNUM + 1 + AsmCsrXChange CsrSel + CsrSel = CsrSel + 1 + .endr + +KcsCsrXchange: + CsrSel = LOONGARCH_CSR_KS0 + .rept LOONGARCH_CSR_KS8 - LOONGARCH_CSR_KS0 + 1 + AsmCsrXChange CsrSel + CsrSel = CsrSel + 1 + .endr + +StableTimerCsrXchange: + CsrSel = LOONGARCH_CSR_TMID + .rept LOONGARCH_CSR_TINTCLR - LOONGARCH_CSR_TMID + 1 + AsmCsrXChange CsrSel + CsrSel = CsrSel + 1 + .endr + +TlbRefillCsrXchange: + CsrSel = LOONGARCH_CSR_TLBREBASE + .rept LOONGARCH_CSR_TLBREHI - LOONGARCH_CSR_TLBREBASE + 1 + AsmCsrXChange CsrSel + CsrSel = CsrSel + 1 + .endr + +DirMapCsrXchange: + CsrSel = LOONGARCH_CSR_DMWIN0 + .rept LOONGARCH_CSR_DMWIN3 - LOONGARCH_CSR_DMWIN0 + 1 + AsmCsrXChange CsrSel + CsrSel = CsrSel + 1 + .endr +.end diff --git a/MdePkg/Library/BaseLib/LoongArch64/Csr.c b/MdePkg/Library/BaseLib/LoongArch64/Csr.c new file mode 100644 index 0000000000..d51f30aacc --- /dev/null +++ b/MdePkg/Library/BaseLib/LoongArch64/Csr.c @@ -0,0 +1,81 @@ +/** @file + LoongArch CSR operation functions. + + Copyright (c) 2023, Loongson Technology Corporation Limited. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent +**/ + +UINTN +AsmCsrRead ( + IN UINT16 Select + ); + +UINTN +AsmCsrWrite ( + IN UINT16 Select, + IN UINTN Value + ); + +UINTN +AsmCsrXChg ( + IN UINT16 Select, + IN UINTN Value, + IN UINTN Mask + ); + +/** + CSR read operation. + + @param[in] Select CSR read instruction select values. + + @return The return value of csrrd instruction, return -1 means Select is out of support. +**/ +UINTN +EFIAPI +CsrRead ( + IN UINT16 Select + ) +{ + return AsmCsrRead (Select); +} + +/** + CSR write operation. + + @param[in] Select CSR write instruction select values. + @param[in, out] Value The csrwr will write the value. + + @return The return value of csrwr instruction, that is, store the old value of + the register, return -1 means Select is out of support. +**/ +UINTN +EFIAPI +CsrWrite ( + IN UINT16 Select, + IN OUT UINTN Value + ) +{ + return AsmCsrWrite (Select, Value); +} + +/** + CSR exchange operation. + + @param[in] Select CSR exchange instruction select values. + @param[in, out] Value The csrxchg will write the value. + @param[in] Mask The csrxchg mask value. + + @return The return value of csrxchg instruction, that is, store the old value of + the register, return -1 means Select is out of support. +**/ +UINTN +EFIAPI +CsrXChg ( + IN UINT16 Select, + IN OUT UINTN Value, + IN UINTN Mask + ) +{ + return AsmCsrXChg (Select, Value, Mask); +} -- 2.27.0 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#112398): https://edk2.groups.io/g/devel/message/112398 Mute This Topic: https://groups.io/mt/103129080/7686176 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [rebecca@openfw.io] -=-=-=-=-=-=-=-=-=-=-=-