From: "Chao Li" <lichao@loongson.cn>
To: devel@edk2.groups.io
Cc: Michael D Kinney <michael.d.kinney@intel.com>,
Liming Gao <gaoliming@byosoft.com.cn>,
Zhiguang Liu <zhiguang.liu@intel.com>,
Laszlo Ersek <lersek@redhat.com>
Subject: [edk2-devel] [PATCH v4 09/37] MdePkg: Add a new library named PeiServicesTablePointerLibKs0
Date: Tue, 12 Dec 2023 21:11:56 +0800 [thread overview]
Message-ID: <20231212131156.2470610-1-lichao@loongson.cn> (raw)
In-Reply-To: <20231212130932.2467028-1-lichao@loongson.cn>
Adding PeiServicesTablePointerLibKs0 for LoongArch64, which provides
setting and getting the PEI service table pointer through the CSR KS0
register.
The idea of this library is derived from
ArmPkg/Library/PeiServicesTablePointerLib/
BZ: https://bugzilla.tianocore.org/show_bug.cgi?id=4584
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Signed-off-by: Chao Li <lichao@loongson.cn>
---
.../Library/PeiServicesTablePointerLib.h | 9 +-
.../PeiServicesTablePointer.c | 87 +++++++++++++++++++
.../PeiServicesTablePointerLibKs0.inf | 37 ++++++++
.../PeiServicesTablePointerLibKs0.uni | 20 +++++
MdePkg/MdePkg.dsc | 3 +
5 files changed, 152 insertions(+), 4 deletions(-)
create mode 100644 MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointer.c
create mode 100644 MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerLibKs0.inf
create mode 100644 MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerLibKs0.uni
diff --git a/MdePkg/Include/Library/PeiServicesTablePointerLib.h b/MdePkg/Include/Library/PeiServicesTablePointerLib.h
index 61635eff00..f85c38363c 100644
--- a/MdePkg/Include/Library/PeiServicesTablePointerLib.h
+++ b/MdePkg/Include/Library/PeiServicesTablePointerLib.h
@@ -52,10 +52,11 @@ SetPeiServicesTablePointer (
immediately preceding the Interrupt Descriptor Table (IDT) in memory.
For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes
immediately preceding the Interrupt Descriptor Table (IDT) in memory.
- For Itanium and ARM CPUs, a the PEI Services Table Pointer is stored in
- a dedicated CPU register. This means that there is no memory storage
- associated with storing the PEI Services Table pointer, so no additional
- migration actions are required for Itanium or ARM CPUs.
+ For Itanium, ARM and LoongArch CPUs, a the PEI Services Table Pointer
+ is stored in a dedicated CPU register. This means that there is no
+ memory storage associated with storing the PEI Services Table pointer,
+ so no additional migration actions are required for Itanium, ARM and
+ LoongArch CPUs.
**/
VOID
diff --git a/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointer.c b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointer.c
new file mode 100644
index 0000000000..2560b232f9
--- /dev/null
+++ b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointer.c
@@ -0,0 +1,87 @@
+/** @file
+ PEI Services Table Pointer Library For Reigseter Mechanism.
+
+ This library is used for PEIM which does executed from flash device directly but
+ executed in memory.
+
+ Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
+ Copyright (c) 2011 Hewlett-Packard Corporation. All rights reserved.<BR>
+ Copyright (c) 2023 Loongson Technology Corporation Limited. All rights reserved.<BR>
+
+ SPDX-License-Identifier: BSD-2-Clause-Patent
+
+**/
+
+#include <PiPei.h>
+#include <Library/DebugLib.h>
+#include <Library/PeiServicesTablePointerLib.h>
+#include <Register/LoongArch64/Csr.h>
+
+/**
+ Caches a pointer PEI Services Table.
+
+ Caches the pointer to the PEI Services Table specified by PeiServicesTablePointer
+ in a platform specific manner.
+
+ If PeiServicesTablePointer is NULL, then ASSERT().
+
+ @param PeiServicesTablePointer The address of PeiServices pointer.
+**/
+VOID
+EFIAPI
+SetPeiServicesTablePointer (
+ IN CONST EFI_PEI_SERVICES **PeiServicesTablePointer
+ )
+{
+ ASSERT (PeiServicesTablePointer != NULL);
+ CsrWrite (LOONGARCH_CSR_KS0, (UINTN)PeiServicesTablePointer);
+}
+
+/**
+ Retrieves the cached value of the PEI Services Table pointer.
+
+ Returns the cached value of the PEI Services Table pointer in a CPU specific manner
+ as specified in the CPU binding section of the Platform Initialization Pre-EFI
+ Initialization Core Interface Specification.
+
+ If the cached PEI Services Table pointer is NULL, then ASSERT().
+
+ @return The pointer to PeiServices.
+
+**/
+CONST EFI_PEI_SERVICES **
+EFIAPI
+GetPeiServicesTablePointer (
+ VOID
+ )
+{
+ CONST EFI_PEI_SERVICES **PeiServices;
+
+ PeiServices = (CONST EFI_PEI_SERVICES **)(CsrRead (LOONGARCH_CSR_KS0));
+ ASSERT (PeiServices != NULL);
+ return PeiServices;
+}
+
+/**
+ Perform CPU specific actions required to migrate the PEI Services Table
+ pointer from temporary RAM to permanent RAM.
+
+ For IA32 CPUs, the PEI Services Table pointer is stored in the 4 bytes
+ immediately preceding the Interrupt Descriptor Table (IDT) in memory.
+ For X64 CPUs, the PEI Services Table pointer is stored in the 8 bytes
+ immediately preceding the Interrupt Descriptor Table (IDT) in memory.
+ For Itanium, ARM and LoongArch CPUs, a the PEI Services Table Pointer
+ is stored in a dedicated CPU register. This means that there is no
+ memory storage associated with storing the PEI Services Table pointer,
+ so no additional migration actions are required for Itanium, ARM and
+ LoongArch CPUs.
+
+**/
+VOID
+EFIAPI
+MigratePeiServicesTablePointer (
+ VOID
+ )
+{
+ return;
+}
diff --git a/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerLibKs0.inf b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerLibKs0.inf
new file mode 100644
index 0000000000..e8ecd4616d
--- /dev/null
+++ b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerLibKs0.inf
@@ -0,0 +1,37 @@
+## @file
+# Instance of PEI Services Table Pointer Library using register CSR KS0 for the table pointer.
+#
+# PEI Services Table Pointer Library implementation that retrieves a pointer to the
+# PEI Services Table from a CPU register. Applies to modules that execute from
+# read-only memory.
+#
+# Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
+# Copyright (c) 2011 Hewlett-Packard Corporation. All rights reserved.<BR>
+# Copyright (c) 2023 Loongson Technology Corporation Limited. All rights reserved.<BR>
+#
+# SPDX-License-Identifier: BSD-2-Clause-Patent
+#
+#
+##
+
+[Defines]
+ INF_VERSION = 1.29
+ BASE_NAME = PeiServicesTablePointerLib
+ MODULE_UNI_FILE = PeiServicesTablePointerLibKs0.uni
+ FILE_GUID = 619950D1-7C5F-EA1B-D6DD-2FF7B0A4A2B7
+ MODULE_TYPE = PEIM
+ VERSION_STRING = 1.0
+ LIBRARY_CLASS = PeiServicesTablePointerLib|PEIM PEI_CORE SEC
+
+#
+# VALID_ARCHITECTURES = LOONGARCH64
+#
+
+[Sources]
+ PeiServicesTablePointer.c
+
+[Packages]
+ MdePkg/MdePkg.dec
+
+[LibraryClasses]
+ DebugLib
diff --git a/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerLibKs0.uni b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerLibKs0.uni
new file mode 100644
index 0000000000..2539448ce5
--- /dev/null
+++ b/MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerLibKs0.uni
@@ -0,0 +1,20 @@
+// /** @file
+// Instance of PEI Services Table Pointer Library using register CSR KS0 for the table pointer.
+//
+// PEI Services Table Pointer Library implementation that retrieves a pointer to the
+// PEI Services Table from a CPU register. Applies to modules that execute from
+// read-only memory.
+//
+// Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>
+// Copyright (c) 2011 Hewlett-Packard Corporation. All rights reserved.<BR>
+// Copyright (c) 2023 Loongson Technology Corporation Limited. All rights reserved.<BR>
+//
+// SPDX-License-Identifier: BSD-2-Clause-Patent
+//
+// **/
+
+
+#string STR_MODULE_ABSTRACT #language en-US "Instance of PEI Services Table Pointer Library using CPU register for the table pointer"
+
+#string STR_MODULE_DESCRIPTION #language en-US "The PEI Services Table Pointer Library implementation that retrieves a pointer to the PEI Services Table from a CPU register. Applies to modules that execute from read-only memory."
+
diff --git a/MdePkg/MdePkg.dsc b/MdePkg/MdePkg.dsc
index 3abd1a1e23..109224c527 100644
--- a/MdePkg/MdePkg.dsc
+++ b/MdePkg/MdePkg.dsc
@@ -200,4 +200,7 @@
MdePkg/Library/BaseSerialPortLibRiscVSbiLib/BaseSerialPortLibRiscVSbiLib.inf
MdePkg/Library/BaseSerialPortLibRiscVSbiLib/BaseSerialPortLibRiscVSbiLibRam.inf
+[Components.LOONGARCH64]
+ MdePkg/Library/PeiServicesTablePointerLibKs0/PeiServicesTablePointerLibKs0.inf
+
[BuildOptions]
--
2.27.0
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next prev parent reply other threads:[~2023-12-12 13:12 UTC|newest]
Thread overview: 75+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-12-12 13:09 [edk2-devel] [PATCH v4 00/37] Enable LoongArch virtual machine in edk2 Chao Li
2023-12-12 13:10 ` [edk2-devel] [PATCH v4 01/37] MdePkg: Add the header file named Csr.h for LoongArch64 Chao Li
2023-12-12 13:11 ` [edk2-devel] [PATCH v4 02/37] MdePkg: Add LoongArch64 FPU function set into BaseCpuLib Chao Li
2023-12-12 13:11 ` [edk2-devel] [PATCH v4 03/37] MdePkg: Add LoongArch64 exception function set into BaseLib Chao Li
2023-12-12 13:11 ` [edk2-devel] [PATCH v4 04/37] MdePkg: Add LoongArch64 local interrupt " Chao Li
2023-12-12 13:11 ` [edk2-devel] [PATCH v4 05/37] MdePkg: Add LoongArch Cpucfg function Chao Li
2023-12-12 13:11 ` [edk2-devel] [PATCH v4 06/37] MdePkg: Add read stable counter operation for LoongArch Chao Li
2023-12-12 13:11 ` [edk2-devel] [PATCH v4 07/37] MdePkg: Add CSR " Chao Li
2023-12-12 13:11 ` [edk2-devel] [PATCH v4 08/37] MdePkg: Add IOCSR " Chao Li
2023-12-12 13:11 ` Chao Li [this message]
2023-12-12 13:12 ` [edk2-devel] [PATCH v4 10/37] UefiCpuPkg: Add LoongArch64 CPU Timer library Chao Li
2023-12-19 6:29 ` Ni, Ray
2023-12-12 13:12 ` [edk2-devel] [PATCH v4 11/37] UefiCpuPkg: Add CPU exception library for LoongArch Chao Li
2023-12-19 6:30 ` Ni, Ray
2023-12-12 13:12 ` [edk2-devel] [PATCH v4 12/37] UefiCpuPkg: Add CpuMmuLib.h to UefiCpuPkg Chao Li
2023-12-13 5:17 ` Ni, Ray
2023-12-14 2:53 ` Chao Li
[not found] ` <17A0932406FD861E.11381@groups.io>
2023-12-19 1:59 ` Chao Li
2023-12-19 6:29 ` Ni, Ray
2023-12-19 6:56 ` Chao Li
2023-12-12 13:12 ` [edk2-devel] [PATCH v4 13/37] UefiCpuPkg: Add LoongArch64CpuMmuLib " Chao Li
2023-12-12 13:12 ` [edk2-devel] [PATCH v4 14/37] UefiCpuPkg: Add multiprocessor library for LoongArch64 Chao Li
2023-12-19 6:30 ` Ni, Ray
2023-12-12 13:12 ` [edk2-devel] [PATCH v4 15/37] UefiCpuPkg: Add CpuDxe driver " Chao Li
2023-12-19 6:30 ` Ni, Ray
2023-12-12 13:12 ` [edk2-devel] [PATCH v4 16/37] EmbeddedPkg: Add PcdPrePiCpuIoSize width for LOONGARCH64 Chao Li
2023-12-12 13:12 ` [edk2-devel] [PATCH v4 17/37] ArmVirtPkg: Move PCD of FDT base address and FDT padding to OvmfPkg Chao Li
2023-12-12 13:12 ` [edk2-devel] [PATCH v4 18/37] MdePkg: Add a PCD feature flag named PcdPciIoTranslationIsEnabled Chao Li
2023-12-12 13:12 ` [edk2-devel] [PATCH v4 19/37] UefiCpuPkg: Add MMIO method in CpuIo2Dxe Chao Li
2023-12-12 13:13 ` [edk2-devel] [PATCH v4 20/37] ArmVirtPkg: Enable UefiCpuPkg version CpuIo2Dxe Chao Li
2023-12-12 13:13 ` [edk2-devel] [PATCH v4 21/37] OvmfPkg/RiscVVirt: " Chao Li
2023-12-20 7:01 ` Sunil V L
2023-12-12 13:13 ` [edk2-devel] [PATCH v4 22/37] OvmfPkg/RiscVVirt: Remove PciCpuIo2Dxe from RiscVVirt Chao Li
2023-12-20 7:02 ` Sunil V L
2023-12-12 13:13 ` [edk2-devel] [PATCH v4 23/37] ArmVirtPkg: Move the FdtSerialPortAddressLib to OvmfPkg Chao Li
2023-12-12 13:13 ` [edk2-devel] [PATCH v4 24/37] ArmVirtPkg: Move the PcdTerminalTypeGuidBuffer into OvmfPkg Chao Li
2023-12-12 13:13 ` [edk2-devel] [PATCH v4 25/37] ArmVirtPkg: Move PlatformBootManagerLib to OvmfPkg Chao Li
2023-12-12 13:13 ` [edk2-devel] [PATCH v4 26/37] OvmfPkg/LoongArchVirt: Add stable timer driver Chao Li
2023-12-12 13:13 ` [edk2-devel] [PATCH v4 27/37] OvmfPkg/LoongArchVirt: Add a NULL library named CollectApResouceLibNull Chao Li
2023-12-12 13:13 ` [edk2-devel] [PATCH v4 28/37] OvmfPkg/LoongArchVirt: Add serial port hook library Chao Li
2023-12-12 13:14 ` [edk2-devel] [PATCH v4 29/37] OvmfPkg/LoongArchVirt: Add the early serial port output library Chao Li
2023-12-12 13:14 ` [edk2-devel] [PATCH v4 30/37] OvmfPkg/LoongArchVirt: Add real time clock library Chao Li
2023-12-12 13:14 ` [edk2-devel] [PATCH v4 31/37] OvmfPkg/LoongArchVirt: Add NorFlashQemuLib Chao Li
2023-12-12 13:14 ` [edk2-devel] [PATCH v4 32/37] OvmfPkg/LoongArchVirt: Add FdtQemuFwCfgLib Chao Li
2023-12-12 13:14 ` [edk2-devel] [PATCH v4 33/37] OvmfPkg/LoongArchVirt: Add reset system library Chao Li
2023-12-12 13:14 ` [edk2-devel] [PATCH v4 34/37] OvmfPkg/LoongArchVirt: Support SEC phase Chao Li
2023-12-12 13:14 ` [edk2-devel] [PATCH v4 35/37] OvmfPkg/LoongArchVirt: Support PEI phase Chao Li
2023-12-12 13:14 ` [edk2-devel] [PATCH v4 36/37] OvmfPkg/LoongArchVirt: Add build file Chao Li
2023-12-12 13:14 ` [edk2-devel] [PATCH v4 37/37] OvmfPkg/LoongArchVirt: Add self introduction file Chao Li
[not found] ` <17A017B459AD36A8.31409@groups.io>
2023-12-19 12:59 ` [edk2-devel] [PATCH v4 09/37] MdePkg: Add a new library named PeiServicesTablePointerLibKs0 Chao Li
2023-12-19 13:01 ` Chao Li
2023-12-19 13:07 ` 回复: " gaoliming via groups.io
2023-12-20 1:20 ` Chao Li
2023-12-21 7:16 ` 回复: " gaoliming via groups.io
2023-12-21 11:18 ` Chao Li
2023-12-25 1:33 ` 回复: " gaoliming via groups.io
2023-12-27 1:43 ` Chao Li
[not found] ` <17A017C0864F4177.31409@groups.io>
2023-12-19 13:02 ` [edk2-devel] [PATCH v4 18/37] MdePkg: Add a PCD feature flag named PcdPciIoTranslationIsEnabled Chao Li
[not found] ` <17A017C201FEB90D.32321@groups.io>
2023-12-19 13:03 ` [edk2-devel] [PATCH v4 19/37] UefiCpuPkg: Add MMIO method in CpuIo2Dxe Chao Li
2023-12-20 1:57 ` Ni, Ray
2023-12-20 7:41 ` Ard Biesheuvel
2023-12-20 9:44 ` Ni, Ray
2023-12-20 9:54 ` Ard Biesheuvel
2023-12-20 12:28 ` Ni, Ray
2023-12-20 15:17 ` Ard Biesheuvel
2023-12-21 3:48 ` Chao Li
2023-12-21 7:31 ` Ard Biesheuvel
2023-12-21 12:11 ` Chao Li
2023-12-21 12:31 ` Ard Biesheuvel
2023-12-21 12:41 ` Chao Li
2023-12-21 13:59 ` Ard Biesheuvel
2023-12-22 1:14 ` Chao Li
2023-12-22 2:37 ` Ni, Ray
2023-12-22 9:47 ` Ard Biesheuvel
2023-12-22 9:56 ` Chao Li
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