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From: "Dhaval Sharma" <dhaval@rivosinc.com>
To: devel@edk2.groups.io
Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>,
	Jiewen Yao <jiewen.yao@intel.com>,
	Jordan Justen <jordan.l.justen@intel.com>,
	Gerd Hoffmann <kraxel@redhat.com>,
	Sunil V L <sunilvl@ventanamicro.com>,
	Andrei Warkentin <andrei.warkentin@intel.com>,
	Laszlo Ersek <lersek@redhat.com>,
	Pedro Falcato <pedro.falcato@gmail.com>
Subject: [edk2-devel] [PATCH v10 5/5] OvmfPkg/RiscVVirt: Override for RISC-V CPU Features
Date: Wed, 13 Dec 2023 20:29:31 +0530	[thread overview]
Message-ID: <20231213145931.28307-6-dhaval@rivosinc.com> (raw)
In-Reply-To: <20231213145931.28307-1-dhaval@rivosinc.com>

This PCD provides a way for platform to override any
HW features that are default enabled by previous stages
of FW (like OpenSBI). For the case where previous/prev
stage has disabled the feature, this override is not
useful and its usage should be avoided.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Cc: Andrei Warkentin <andrei.warkentin@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Pedro Falcato <pedro.falcato@gmail.com>

Signed-off-by: Dhaval Sharma <dhaval@rivosinc.com>
Acked-by: Laszlo Ersek <lersek@redhat.com>
Reviewed-by: Andrei Warkentin <andrei.warkentin@...>
---

Notes:
    V10:
    - Only keep CMO feature bitmask bit to disabled. Unimplemented bits
      remain 1.
    V8:
    - Added RV tag
    V7:
    - Added RB tag
    v6:
    - Modify PCD name according to changes made in Baselib implementation
    V5:
    - Introduce PCD for platform

 OvmfPkg/RiscVVirt/RiscVVirt.dsc.inc | 1 +
 1 file changed, 1 insertion(+)

diff --git a/OvmfPkg/RiscVVirt/RiscVVirt.dsc.inc b/OvmfPkg/RiscVVirt/RiscVVirt.dsc.inc
index fe320525153f..a050f1ffc1d4 100644
--- a/OvmfPkg/RiscVVirt/RiscVVirt.dsc.inc
+++ b/OvmfPkg/RiscVVirt/RiscVVirt.dsc.inc
@@ -203,6 +203,7 @@ [PcdsFeatureFlag]
   gEfiMdeModulePkgTokenSpaceGuid.PcdInstallAcpiSdtProtocol|TRUE
 
 [PcdsFixedAtBuild.common]
+  gEfiMdePkgTokenSpaceGuid.PcdRiscVFeatureOverride|0xFFFFFFFE
   gEfiMdePkgTokenSpaceGuid.PcdMaximumUnicodeStringLength|1000000
   gEfiMdePkgTokenSpaceGuid.PcdMaximumAsciiStringLength|1000000
   gEfiMdePkgTokenSpaceGuid.PcdMaximumLinkedListLength|0
-- 
2.39.2



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  parent reply	other threads:[~2023-12-13 15:01 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-12-13 14:59 [edk2-devel] [PATCH v10 0/5] Cache Management Operations Support For RISC-V Dhaval Sharma
2023-12-13 14:59 ` [edk2-devel] [PATCH v10 1/5] MdePkg: Move RISC-V Cache Management Declarations Into BaseLib Dhaval Sharma
2023-12-13 14:59 ` [edk2-devel] [PATCH v10 2/5] MdePkg: Rename Cache Management Function To Clarify Fence Based Op Dhaval Sharma
2023-12-13 14:59 ` [edk2-devel] [PATCH v10 3/5] MdePkg: Implement RISC-V Cache Management Operations Dhaval Sharma
2023-12-13 14:59 ` [edk2-devel] [PATCH v10 4/5] MdePkg: Utilize Cache Management Operations Implementation For RISC-V Dhaval Sharma
2023-12-19  7:28   ` Sunil V L
2023-12-19  7:33     ` Dhaval Sharma
2024-01-08 13:21   ` Laszlo Ersek
2024-01-08 15:26     ` yorange
2024-01-08 16:23       ` Dhaval Sharma
2024-01-08 21:53         ` Pedro Falcato
2024-01-09  5:31           ` Sunil V L
2024-01-09 16:19             ` Andrei Warkentin
2024-01-12  7:15               ` Dhaval Sharma
2024-01-09  2:14       ` yorange
2023-12-13 14:59 ` Dhaval Sharma [this message]
2023-12-19  7:31   ` [edk2-devel] [PATCH v10 5/5] OvmfPkg/RiscVVirt: Override for RISC-V CPU Features Sunil V L
2023-12-19 14:01 ` [edk2-devel] [PATCH v10 0/5] Cache Management Operations Support For RISC-V Sunil V L

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