From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by spool.mail.gandi.net (Postfix) with ESMTPS id 46CA4AC18E1 for ; Wed, 3 Jan 2024 13:59:11 +0000 (UTC) DKIM-Signature: a=rsa-sha256; bh=up6W5lDOyG/he/VVjTB7MfOUaGoIqIbdOqzvu/xh5dU=; c=relaxed/simple; d=groups.io; h=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Transfer-Encoding; s=20140610; t=1704290350; v=1; b=cHqrbH4UQ7/8rIo0RNhO/7yEqtI4Gbjqv7rG2hgClSFGpGxd2KQPyn9onOzufUcC+sJxMeD0 vsvy1lZw6Eew8LV0e4RpyCj+OhPUbJRpf1RXOM2dJKSyYSRcB3LgSy3muplA5QZh2GVOVuSR66g 38vU6rWZYoa4oL22O/1jxYj8= X-Received: by 127.0.0.2 with SMTP id JHzpYY7687511xR2ucp6la9F; Wed, 03 Jan 2024 05:59:10 -0800 X-Received: from mail-io1-f51.google.com (mail-io1-f51.google.com [209.85.166.51]) by mx.groups.io with SMTP id smtpd.web10.17859.1704290349430462077 for ; Wed, 03 Jan 2024 05:59:09 -0800 X-Received: by mail-io1-f51.google.com with SMTP id ca18e2360f4ac-7b7fdde8b98so519988539f.1 for ; Wed, 03 Jan 2024 05:59:09 -0800 (PST) X-Gm-Message-State: ox79FsaZMIJsGBRbE9f34bO6x7686176AA= X-Google-Smtp-Source: AGHT+IHqGT6ltqv2pdQpAR52GDYbUoj1/sbmfiwNlnMW7glNaIPfE2VVQlR/2fj0qWVXWITwpvYEeQ== X-Received: by 2002:a05:6602:158f:b0:7b7:c981:1002 with SMTP id e15-20020a056602158f00b007b7c9811002mr27999434iow.19.1704290347923; Wed, 03 Jan 2024 05:59:07 -0800 (PST) X-Received: from sunil-laptop.dc1.ventanamicro.com ([106.51.188.200]) by smtp.gmail.com with ESMTPSA id w6-20020a056638378600b0046dcaba1adesm1213393jal.62.2024.01.03.05.59.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 03 Jan 2024 05:59:07 -0800 (PST) From: "Sunil V L" To: devel@edk2.groups.io Cc: Sunil V L , Michael D Kinney , Liming Gao , Zhiguang Liu , Andrei Warkentin Subject: [edk2-devel] [PATCH 2/4] MdePkg/BaseLib: RISC-V: Add function to update stimecmp register Date: Wed, 3 Jan 2024 19:28:47 +0530 Message-Id: <20240103135849.127251-3-sunilvl@ventanamicro.com> In-Reply-To: <20240103135849.127251-1-sunilvl@ventanamicro.com> References: <20240103135849.127251-1-sunilvl@ventanamicro.com> MIME-Version: 1.0 Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,sunilvl@ventanamicro.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: Content-Transfer-Encoding: 8bit X-GND-Status: LEGIT Authentication-Results: spool.mail.gandi.net; dkim=pass header.d=groups.io header.s=20140610 header.b=cHqrbH4U; dmarc=none; spf=pass (spool.mail.gandi.net: domain of bounce@groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce@groups.io stimecmp is a CSR supported only when Sstc extension is supported by the platform. This register can be used to set the timer interrupt directly in S-mode instead of going via SBI call. Add a function to update this register. Cc: Michael D Kinney Cc: Liming Gao Cc: Zhiguang Liu Cc: Andrei Warkentin Signed-off-by: Sunil V L --- MdePkg/Include/Library/BaseLib.h | 5 +++++ MdePkg/Include/Register/RiscV64/RiscVEncoding.h | 3 +++ MdePkg/Library/BaseLib/RiscV64/ReadTimer.S | 7 +++++++ 3 files changed, 15 insertions(+) diff --git a/MdePkg/Include/Library/BaseLib.h b/MdePkg/Include/Library/BaseLib.h index b71e47f41b7f..ca0d06c7f335 100644 --- a/MdePkg/Include/Library/BaseLib.h +++ b/MdePkg/Include/Library/BaseLib.h @@ -191,6 +191,11 @@ RiscVReadTimer ( VOID ); +VOID +RiscVSetSupervisorTimeCompareRegister ( + IN UINT64 + ); + VOID RiscVEnableTimerInterrupt ( VOID diff --git a/MdePkg/Include/Register/RiscV64/RiscVEncoding.h b/MdePkg/Include/Register/RiscV64/RiscVEncoding.h index 2bde8db478ff..8ccdea2f4fcd 100644 --- a/MdePkg/Include/Register/RiscV64/RiscVEncoding.h +++ b/MdePkg/Include/Register/RiscV64/RiscVEncoding.h @@ -96,6 +96,9 @@ /* Supervisor Protection and Translation */ #define CSR_SATP 0x180 +/* Sstc extension */ +#define CSR_STIMECMP 0x14D + /* Trap/Exception Causes */ #define CAUSE_MISALIGNED_FETCH 0x0 #define CAUSE_FETCH_ACCESS 0x1 diff --git a/MdePkg/Library/BaseLib/RiscV64/ReadTimer.S b/MdePkg/Library/BaseLib/RiscV64/ReadTimer.S index 39a06efa51ef..36781c29c0b9 100644 --- a/MdePkg/Library/BaseLib/RiscV64/ReadTimer.S +++ b/MdePkg/Library/BaseLib/RiscV64/ReadTimer.S @@ -21,3 +21,10 @@ ASM_FUNC (RiscVReadTimer) csrr a0, CSR_TIME ret + +// +// Set Supervisor Time Compare Register +// +ASM_FUNC (RiscVSetSupervisorTimeCompareRegister) + csrw CSR_STIMECMP, a0 + ret -- 2.34.1 -=-=-=-=-=-=-=-=-=-=-=- Groups.io Links: You receive all messages sent to this group. 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