From: "Sunil V L" <sunilvl@ventanamicro.com>
To: devel@edk2.groups.io
Cc: Sunil V L <sunilvl@ventanamicro.com>,
Gerd Hoffmann <kraxel@redhat.com>,
Rahul Kumar <rahul1.kumar@intel.com>,
Laszlo Ersek <lersek@redhat.com>, Ray Ni <ray.ni@intel.com>,
Andrei Warkentin <andrei.warkentin@intel.com>
Subject: [edk2-devel] [PATCH 3/4] UefiCpuPkg/CpuTimerDxeRiscV64: Add support for Sstc
Date: Wed, 3 Jan 2024 19:28:48 +0530 [thread overview]
Message-ID: <20240103135849.127251-4-sunilvl@ventanamicro.com> (raw)
In-Reply-To: <20240103135849.127251-1-sunilvl@ventanamicro.com>
Sstc extension allows to program the timer and receive the interrupt
without using an SBI call. This reduces the latency to generate the timer
interrupt. So, detect whether Sstc extension is supported and use the
stimecmp register directly to program the timer interrupt.
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Rahul Kumar <rahul1.kumar@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Ray Ni <ray.ni@intel.com>
Cc: Andrei Warkentin <andrei.warkentin@intel.com>
Signed-off-by: Sunil V L <sunilvl@ventanamicro.com>
---
.../CpuTimerDxeRiscV64/CpuTimerDxeRiscV64.inf | 1 +
UefiCpuPkg/CpuTimerDxeRiscV64/Timer.h | 2 ++
UefiCpuPkg/CpuTimerDxeRiscV64/Timer.c | 30 +++++++++++++++++--
3 files changed, 31 insertions(+), 2 deletions(-)
diff --git a/UefiCpuPkg/CpuTimerDxeRiscV64/CpuTimerDxeRiscV64.inf b/UefiCpuPkg/CpuTimerDxeRiscV64/CpuTimerDxeRiscV64.inf
index aba660186dc0..f2a2cf12caef 100644
--- a/UefiCpuPkg/CpuTimerDxeRiscV64/CpuTimerDxeRiscV64.inf
+++ b/UefiCpuPkg/CpuTimerDxeRiscV64/CpuTimerDxeRiscV64.inf
@@ -41,6 +41,7 @@ [Sources.RISCV64]
Timer.c
[Pcd]
+ gEfiMdePkgTokenSpaceGuid.PcdRiscVFeatureOverride ## CONSUMES
gUefiCpuPkgTokenSpaceGuid.PcdCpuCoreCrystalClockFrequency ## CONSUMES
[Protocols]
diff --git a/UefiCpuPkg/CpuTimerDxeRiscV64/Timer.h b/UefiCpuPkg/CpuTimerDxeRiscV64/Timer.h
index 9b3542230cb5..5e5071b3f0b2 100644
--- a/UefiCpuPkg/CpuTimerDxeRiscV64/Timer.h
+++ b/UefiCpuPkg/CpuTimerDxeRiscV64/Timer.h
@@ -26,6 +26,8 @@
//
#define DEFAULT_TIMER_TICK_DURATION 100000
+#define RISCV_CPU_FEATURE_SSTC_BITMASK 0x2
+
extern VOID
RiscvSetTimerPeriod (
UINT32 TimerPeriod
diff --git a/UefiCpuPkg/CpuTimerDxeRiscV64/Timer.c b/UefiCpuPkg/CpuTimerDxeRiscV64/Timer.c
index 30e48061cd06..4babfb4bfc60 100644
--- a/UefiCpuPkg/CpuTimerDxeRiscV64/Timer.c
+++ b/UefiCpuPkg/CpuTimerDxeRiscV64/Timer.c
@@ -44,6 +44,19 @@ STATIC EFI_TIMER_NOTIFY mTimerNotifyFunction;
STATIC UINT64 mTimerPeriod = 0;
STATIC UINT64 mLastPeriodStart = 0;
+/**
+ Check whether Sstc is enabled in PCD.
+
+**/
+STATIC
+BOOLEAN
+RiscVIsSstcEnabled (
+ VOID
+ )
+{
+ return ((PcdGet64 (PcdRiscVFeatureOverride) & RISCV_CPU_FEATURE_SSTC_BITMASK) != 0);
+}
+
/**
Timer Interrupt Handler.
@@ -94,7 +107,12 @@ TimerInterruptHandler (
),
1000000u
); // convert to tick
- SbiSetTimer (PeriodStart);
+ if (RiscVIsSstcEnabled ()) {
+ RiscVSetSupervisorTimeCompareRegister (PeriodStart);
+ } else {
+ SbiSetTimer (PeriodStart);
+ }
+
RiscVEnableTimerInterrupt (); // enable SMode timer int
gBS->RestoreTPL (OriginalTPL);
}
@@ -197,7 +215,11 @@ TimerDriverSetTimerPeriod (
),
1000000u
); // convert to tick
- SbiSetTimer (PeriodStart);
+ if (RiscVIsSstcEnabled ()) {
+ RiscVSetSupervisorTimeCompareRegister (PeriodStart);
+ } else {
+ SbiSetTimer (PeriodStart);
+ }
mCpu->EnableInterrupt (mCpu);
RiscVEnableTimerInterrupt (); // enable SMode timer int
@@ -282,6 +304,10 @@ TimerDriverInitialize (
//
mTimerNotifyFunction = NULL;
+ if (RiscVIsSstcEnabled ()) {
+ DEBUG ((DEBUG_INFO, "%a: Timer interrupt is via Sstc extension\n", __func__));
+ }
+
//
// Make sure the Timer Architectural Protocol is not already installed in the system
//
--
2.34.1
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next prev parent reply other threads:[~2024-01-03 13:59 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-01-03 13:58 [edk2-devel] [PATCH 0/4] RISC-V: Add support for Sstc extension Sunil V L
2024-01-03 13:58 ` [edk2-devel] [PATCH 1/4] MdePkg.dec: RISC-V: Define override bit " Sunil V L
2024-01-03 13:58 ` [edk2-devel] [PATCH 2/4] MdePkg/BaseLib: RISC-V: Add function to update stimecmp register Sunil V L
2024-01-03 13:58 ` Sunil V L [this message]
2024-01-04 14:38 ` [edk2-devel] [PATCH 3/4] UefiCpuPkg/CpuTimerDxeRiscV64: Add support for Sstc Laszlo Ersek
2024-01-04 15:01 ` Sunil V L
2024-01-05 13:52 ` Laszlo Ersek
2024-01-04 15:46 ` Sunil V L
2024-01-05 13:52 ` Laszlo Ersek
2024-01-03 13:58 ` [edk2-devel] [PATCH 4/4] OvmfPkg/RiscVVirt: Override Sstc extension Sunil V L
2024-01-04 14:32 ` Laszlo Ersek
2024-01-04 14:38 ` Laszlo Ersek
2024-01-05 19:10 ` [edk2-devel] [PATCH 0/4] RISC-V: Add support for " Pedro Falcato
2024-01-08 4:06 ` Sunil V L
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